White Electronic Designs
256MB - 32Mx64 DDR SDRAM UNBUFFERED
FEATURES
Double-data-rate architecture
Industrial temperature
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power supply: 2.5V ± 0.20V
JEDEC standard 200 pin SO-DIMM package
W3EG6432S-D4
PRELIMINARY*
DESCRIPTION
The W3EG6432S is a 32Mx64 Double Data Rate
SDRAM memory module based on 256Mb DDR SDRAM
component. The module consists of eight 32Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 200
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
OPERATING FREQUENCIES
DDR266 @CL=2
Clock Speed
CL-t
RCD
-t
RP
133MHz
2-2-2
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-3-3
DDR200 @CL=2
100MHz
2-2-2
April 2004
Rev. 1
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
PIN CONFIGURATION
PIN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
April 2004
Rev. 1
W3EG6432S-D4
PRELIMINARY
PIN NAMES
SYMBOL
DQ42
DQ46
DQ43
DQ47
V
CC
V
CC
V
CC
NC
V
SS
NC
V
SS
V
SS
DQ48
DQ52
DQ49
DQ53
V
CC
V
CC
DQS6
DM6
DQ50
DQ54
V
SS
V
SS
DQ51
DQ55
DQ56
DQ60
V
CC
V
CC
DQ57
DQ61
DQS7
DM7
V
SS
V
SS
DQ58
DQ62
DQ59
DQ63
V
CC
V
CC
SDA
SA0
SCL
SA1
V
CCSPD
SA2
V
CCID
NC
SYMBOL PIN#
V
REF
51
V
REF
52
53
V
SS
V
SS
54
DQ0
55
DQ4
56
DQ1
57
DQ5
58
V
CC
59
V
CC
60
DQS0
61
DM0
62
DQ2
63
DQ6
64
65
V
SS
V
SS
66
DQ3
67
DQ7
68
DQ8
69
DQ12
70
V
CC
71
72
V
CC
DQ9
73
DQ13
74
DQS1
75
DM1
76
V
SS
77
78
V
SS
DQ10
79
DQ14
80
DQ11
81
DQ15
82
V
CC
83
V
CC
84
CK0
85
V
CC
86
CK0#
87
V
SS
88
V
SS
89
90
V
SS
DQ16
91
DQ20
92
DQ17
93
DQ21
94
V
CC
95
V
CC
96
DQS2
97
DM2
98
DQ18
99
DQ22
100
SYMBOL PIN#
V
SS
101
V
SS
102
DQ19
103
DQ23
104
DQ24
105
DQ28
106
V
CC
107
V
CC
108
DQ25
109
DQ29
110
DQS3
111
DM3
112
V
SS
113
V
SS
114
DQ26
115
DQ30
116
DQ27
117
DQ31
118
V
CC
119
V
CC
120
NC
121
NC
122
NC
123
NC
124
V
SS
125
V
SS
126
DQS8
127
DM8
128
NC
129
NC
130
V
CC
131
V
CC
132
NC
133
NC
134
NC
135
NC
136
V
SS
137
V
SS
138
NC
139
V
SS
140
NC
141
V
CC
142
V
CC
143
V
CC
144
NC
145
CKE0
146
NC
147
NC
148
A12
149
A11
150
SYMBOL PIN#
A9
151
A8
152
V
SS
153
V
SS
154
A7
155
A6
156
A5
157
A4
158
A3
159
A2
160
A1
161
A0
162
V
CC
163
V
CC
164
A10/AP
165
BA1
166
BA0
167
RAS#
168
WE#
169
CAS#
170
CS0
171
NC
172
NC
173
NC
174
V
SS
175
V
SS
176
DQ32
177
DQ36
178
DQ33
179
DQ37
180
V
CC
181
V
CC
182
DQS4
183
DM4
184
DQ34
185
DQ38
186
V
SS
187
V
SS
188
DQ35
189
DQ39
190
DQ40
191
DQ44
192
V
CC
193
V
CC
194
DQ41
195
DQ45
196
DQS5
197
DM5
198
V
SS
199
V
SS
200
A0-A12
BA0-BA1
DQ0-DQ63
DQS0-DQS8
CK0
CK0#
CKE0
CS0#
RAS#
CAS#
WE#
DQM0-DQM8
V
CC
V
CCQ
V
SS
V
REF
V
CCSPD
SDA
SCL
SA0-SA2
V
CCID
NC
Address input (Multiplexed)
Bank Select Address
Data Input/Output
Data Strobe Input/Output
Clock Input
Clock Input
Clock Enable input
Chip Select Input
Row Address Strobe
Column Address Strobe
Write Enable
Data-In Mask
Power Supply (2.5V)
Power Supply for DQS (2.5V)
Ground
Power Supply for Reference
Serial EEPROM Power Supply
(2.3V to 3.6V)
Serial data I/O
Serial clock
Address in EEPROM
V
CC
Indentification Flag
No Connect
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FUNCTIONAL BLOCK DIAGRAM
W3EG6432S-D4
PRELIMINARY
CS0#
DQS0
DQM0
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS2
DQM2
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQS4
DQM4
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQS6
DQM6
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DM CS# DQS
DQ0
DQ1 U4
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM CS# DQS
DQ0
DQ1 U3
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS1
DQM1
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DM CS# DQS
DQ0
DQ1 U8
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM CS# DQS
DQ0
DQ1 U2
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS3
DQM3
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DM CS# DQS
DQ0
DQ1 U7
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DM CS# DQS
DQ0
DQ1 U1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS5
DQM5
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DM CS# DQS
DQ0
DQ1 U6
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS7
DQM7
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DM CS# DQS
DQ0
DQ1 U5
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
120
BA0, BA1
A0-A12
RAS#
CAS#
CKE0
WE#
BA0, BA1: DDR SDRAMs
A0-A12: DDR SDRAMs
RAS#: DDR SDRAMs
CAS#: DDR SDRAMs
CKE0: DDR SDRAMs
WE#: DDR SDRAMs
CK1
CK1#
CK0
CK0#
120
DDR SDRAM X 4
DDR SDRAM X 4
SERIAL PD
SCL
WP
SDA
A0
A1
A2
SA0 SA1 SA2
V
CC
SPD
V
CC
V
REF
SPD
DDR SDRAMs
DDR SDRAMs
DDR SDRAMs
V
SS
NOTE: All resistor values are 22 ohms unless otherwise specified.
April 2004
Rev. 1
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
SS
Voltage on V
CC
supply relative to V
SS
Storage Temperature
Power Dissipation
Short Circuit Current
Note:
Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
W3EG6432S-D4
PRELIMINARY
Symbol
V
IN
, V
OUT
V
CC
, V
CCQ
T
STG
P
D
I
OS
Value
-0.5 to 3.6
-1.0 to 3.6
-55 to +150
8
50
Units
V
V
°C
W
mA
DC CHARACTERISTICS
0°C
≤
T
A
≤
70°C, V
CC
= 2.5V ± 0.2V
Symbol
V
CC
V
CCQ
V
REF
V
TT
V
IH
V
IL
V
OH
V
OL
Parameter
Supply Voltage
Supply Voltage
Reference Voltage
Termination Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Min
2.3
2.3
V
CCQ/2
- 50mV
V
REF
- 0.04
V
REF
+ 0.15
-0.3
V
TT
+ 0.76
—
Max
2.7
2.7
V
CCQ/2
+ 50mV
V
REF
+ 0.04
V
CCQ
+ 0.3
V
REF
- 0.15
—
V
TT
- 0.76
Unit
V
V
V
V
V
V
V
V
CAPACITANCE
T
A
= 25°C, f = 1MHz, V
CC
= 3.3V, V
REF
=1.4V
±
200mV
Parameter
Input Capacitance (A0-A12)
Input Capacitance (RAS#, CAS#, WE#)
Input Capacitance (CKE0)
Input Capacitance (CK0,CK0#)
Input Capacitance (CS0#)
Input Capacitance (DQM0-DQM8)
Input Capacitance (BA0-BA1)
Data input/output capacitance (DQ0-DQ63)(DQS)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
IN5
C
IN6
C
IN7
C
OUT
Max
29
29
29
26
29
8
29
8
Unit
pF
pF
pF
pF
pF
pF
pF
pF
April 2004
Rev. 1
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
IDD SPECIFICATIONS AND TEST CONDITIONS
W3EG6432S-D4
PRELIMINARY
Recommended operating conditions, 0°C
≤
T
A
≤
70°C, V
CCQ
= 2.5V ± 0.2V, V
CC
= 2.5V ± 0.2V
Parameter
Symbol Conditions
One device bank; Active - Precharge;
t
RC
=t
RC
(MIN); t
CK
=t
CK
(MIN); DQ,DM
and DQS inputs changing once per
clock cycle; Address and control inputs
changing once every two cycles.
One device bank; Active-Read-Precharge;
Burst = 2; t
RC
=t
RC
(MIN);t
CK
=t
CK
(MIN);
Iout = 0mA; Address and control inputs
changing once per clock cycle.
All device banks idle; Power- down mode;
t
CK
=t
CK
(MIN); CKE=(low)
CS# = High; All device banks idle;
t
CK
=t
CK
(MIN); CKE = high; Address and
other control inputs changing once per
clock cycle. Vin = Vref for DQ, DQS and
DM.
One device bank active; Power-down
mode; t
CK
(MIN); CKE=(low)
CS# = High; CKE = High; One device
bank; Active-Precharge; t
RC
=t
RAS
(MAX);
t
CK
=t
CK
(MIN); DQ, DM and DQS inputs
changing twice per clock cycle; Address
and other control inputs changing once
per clock cycle.
Burst = 2; Reads; Continous burst; One
device bank active;Address and control
inputs changing once per clock cycle;
t
CK
=t
CK
(MIN); Iout = 0mA.
Burst = 2; Writes; Continous burst; One
device bank active; Address and control
inputs changing once per clock cycle;
t
CK
=t
CK
(MIN); DQ,DM and DQS inputs
changing twice per clock cycle.
t
RC
=t
RC
(MIN)
CKE
≤
0.2V
Four bank interleaving Reads (BL=4)
with auto precharge with t
RC
=t
RC
(MIN);
t
CK
=t
CK
(MIN); Address and control inputs
change only during Active Read or Write
commands.
DDR266@CL=2 DDR266@CL=2.5 DDR266@CL=2 DDR200@CL=2
Max
Max
Max
Max
2-2-2
2.5-3-3
2-3-3
2-2-2
Units
Operating Current
I
DD0
720
640
640
600
mA
Operating Current
I
DD1
920
840
840
720
mA
Precharge Power-
Down Standby
Current
I
DD2P
24
24
24
24
mA
Idle Standby
Current
I
DD2F
160
160
160
144
mA
Active Power-Down
Standby Current
I
DD3P
240
240
240
200
mA
Active Standby
Current
I
DD3N
360
360
360
320
mA
Operating Current
I
DD4R
1120
1120
1120
800
mA
Operating Current
I
DD4W
1080
1080
1080
880
mA
Auto Refresh
Current
Self Refresh
Current
I
DD5
I
DD6
1280
24
1280
24
1280
24
1200
24
mA
mA
Operating Current
I
DD7A
2240
2000
2000
1760
mA
April 2004
Rev. 1
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
Talking
京公网安备 11010802033920号
EEWORLD
