MC74LCX74
Low-Voltage CMOS Dual
D-Type Flip-Flop
With 5 V−Tolerant Inputs
The MC74LCX74 is a high performance, dual D−type flip−flop
with asynchronous clear and set inputs and complementary (O, O)
outputs. It operates from a 2.3 to 3.6 V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A V
I
specification of 5.5 V allows MC74LCX74 inputs
to be safely driven from 5.0 V devices.
The MC74LCX74 consists of 2 edge−triggered flip−flops with
individual D−type inputs. The flip−flop will store the state of
individual D inputs, that meet the setup and hold time requirements, on
the LOW−to−HIGH Clock (CP) transition.
Features
http://onsemi.com
MARKING
DIAGRAMS
14
14
1
SOIC−14
D SUFFIX
CASE 751A
1
LCX74G
AWLYWW
14
14
1
TSSOP−14
DT SUFFIX
CASE 948G
1
A
L, WL
Y, YY
W, WW
G or
G
LCX
74
ALYWG
G
Designed for 2.3 V to 3.6 V V
CC
Operation
5.0 V Tolerant Inputs
−
Interface Capability With 5.0 V TTL Logic
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10
mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
Semiconductor Components Industries, LLC, 2012
October, 2012
−
Rev. 8
1
Publication Order Number:
MC74LCX74/D
MC74LCX74
SD1
4
SD
D
CP
CD
CD1
1
Q
Q
5
6
O1
O1
D1
CP1
2
3
V
CC
CD2
14
13
D2
12
CP2 SD2 O2
11
10
9
O2
8
SD2
1
CD1
2
D1
3
CP1
4
5
6
O1
7
GND
D2
CP2
SD1 O1
10
SD
D
CP
CD
Q
Q
9
8
O2
O2
Figure 1. Pinout: 14−Lead (Top View)
12
11
CD2
13
Figure 2. Logic Diagram
PIN NAMES
Pins
CP1, CP2
D1−D2
CD1, CD2
SD1, SD2
On−On
Function
Clock Pulse Inputs
Data Inputs
Direct Clear Inputs
Direct Set Inputs
Outputs
TRUTH TABLE
Inputs
SDn
L
H
L
H
H
H
H
h
L
l
NC
X
CDn
H
L
L
H
H
H
CPn
X
X
X
Dn
X
X
X
h
l
X
Outputs
On
H
L
H
H
L
NC
On
L
H
H
L
H
NC
Load and Read Register
Hold
Operating Mode
Asynchronous Set
Asynchronous Clear
Undetermined
= High Voltage Level
= High Voltage Level One Setup Time Prior to the Low−to−High Clock Transition
= Low Voltage Level
= Low Voltage Level One Setup Time Prior to the Low−to−High Clock Transition
= No Change
= High or Low Voltage Level and Transitions are Acceptable
= Low−to−High Transition
= Not a Low−to−High Transition
For I
CC
reasons, DO NOT FLOAT Inputs
http://onsemi.com
2
MC74LCX74
MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
MSL
Parameter
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
Value
−0.5
to +7.0
−0.5
V
I
+7.0
−0.5
V
O
V
CC
+ 0.5
−50
−50
+50
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
Moisture Sensitivity
50
100
100
−65
to +150
Level 1
Output in HIGH or LOW State (Note 1)
V
I
< GND
V
O
< GND
V
O
> V
CC
Condition
Units
V
V
V
mA
mA
mA
mA
mA
mA
C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. I
O
absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
Supply Voltage
Operating
Data Retention Only
Input Voltage
Output Voltage (HIGH or LOW State)
HIGH Level Output Current
V
CC
= 3.0 V
−
3.6 V
V
CC
= 2.7 V
−
3.0 V
V
CC
= 2.3 V
−
2.7 V
LOW Level Output Current
V
CC
= 3.0 V
−
3.6 V
V
CC
= 2.7 V
−
3.0 V
V
CC
= 2.3 V
−
2.7 V
Operating Free−Air Temperature
Input Transition Rise or Fall Rate, V
IN
from 0.8 V to 2.0 V, V
CC
= 3.0 V
−40
0
Parameter
Min
2.0
1.5
0
0
Type
2.5, 3.3
2.5, 3.3
Max
3.6
3.6
5.5
V
CC
−24
−12
−8
+24
+12
+8
+85
10
Units
V
V
I
V
O
I
OH
V
V
mA
I
OL
mA
T
A
Dt/DV
C
ns/V
ORDERING INFORMATION
Device
MC74LCX74DG
MC74LCX74DR2G
MC74LCX74DTG
MC74LCX74DTR2G
Package
SOIC−14
(Pb−Free)
SOIC−14
(Pb−Free)
TSSOP−14
(Pb−Free)
TSSOP−14
(Pb−Free)
Shipping
†
55 Units / Rail
2500 Tape & Reel
96 Units / Rail
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
3
MC74LCX74
DC ELECTRICAL CHARACTERISTICS
T
A
=
−40C
to +85C
Symbol
V
IH
V
IL
V
OH
Characteristic
HIGH Level Input Voltage (Note 2)
Condition
2.3 V
V
CC
2.7 V
2.7 V
V
CC
3.6 V
LOW Level Input Voltage (Note 2)
2.3 V
V
CC
2.7 V
2.7 V
V
CC
3.6 V
HIGH Level Output Voltage
2.3 V
V
CC
3.6 V; I
OH
=
−100
mA
V
CC
= 2.3 V; I
OH
=
−8
mA
V
CC
= 2.7 V; I
OH
=
−12
mA
V
CC
= 3.0 V; I
OH
=
−18
mA
V
CC
= 3.0 V; I
OH
=
−24
mA
V
OL
LOW Level Output Voltage
2.3 V
V
CC
3.6 V; I
OL
= 100
mA
V
CC
= 2.3 V; I
OL
= 8 mA
V
CC
= 2.7 V; I
OL
= 12 mA
V
CC
= 3.0 V; I
OL
= 16 mA
V
CC
= 3.0 V; I
OL
= 24 mA
I
OFF
I
IN
I
CC
DI
CC
Power Off Leakage Current
Input Leakage Current
Quiescent Supply Current
Increase in I
CC
per Input
V
CC
= 0, V
IN
= 5.5 V or V
OUT
= 5.5 V
V
CC
= 3.6 V, V
IN
= 5.5 V or GND
V
CC
= 3.6 V, V
IN
= 5.5 V or GND
2.3
V
CC
3.6 V; V
IH
= V
CC
−
0.6 V
V
CC
−
0.2
1.8
2.2
2.4
2.2
0.2
0.6
0.4
0.4
0.55
10
5
10
500
mA
mA
mA
mA
V
Min
1.7
2.0
0.7
0.8
V
V
Max
Units
V
2. These values of V
I
are used to test DC electrical characteristics only.
AC CHARACTERISTICS
(t
R
= t
F
= 2.5 ns; R
L
= 500
W)
Limits
T
A
=
−40C
to +85C
V
CC
= 3.3 V
+
0.3 V
C
L
= 50 pF
Symbol
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
s
t
h
t
w
t
rec
t
OSHL
t
OSLH
Parameter
Clock Pulse Frequency
Propagation Delay
CPn to On or On
Propagation Delay
SDn or CDn to On or On
Setup Time,
HIGH or LOW Dn to CPn
Hold Time, HIGH or LOW Dn to CPn
CPn Pulse Width, HIGH or LOW
SDn or CDn Pulse Width, LOW
Recovery Time SDn or CDn to CPn
Output−to−Output Skew (Note 3)
Waveform
1
1
2
1
1
4
3
Min
150
1.5
1.5
1.5
1.5
2.5
1.5
3.3
3.3
2.5
1.0
1.0
7.0
7.0
7.0
7.0
Max
V
CC
= 2.7 V
C
L
= 50 pF
Min
150
1.5
1.5
1.5
1.5
2.5
1.5
3.3
3.6
3.0
8.0
8.0
8.0
8.0
Max
V
CC
= 2.5 V
+
0.2 V
C
L
= 30 pF
Min
150
1.5
1.5
1.5
1.5
4.0
2.0
4.0
4.0
4.5
8.4
8.4
8.4
8.4
Max
Units
MHz
ns
ns
ns
ns
ns
ns
ns
3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
OSHL
) or LOW−to−HIGH (t
OSLH
); parameter
guaranteed by design.
http://onsemi.com
4
MC74LCX74
DYNAMIC SWITCHING CHARACTERISTICS
T
A
= +25C
Symbol
V
OLP
V
OLV
Characteristic
Dynamic LOW Peak Voltage
(Note 4)
Dynamic LOW Valley Voltage
(Note 4)
Condition
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
V
CC
= 2.5 V, C
L
= 30 pF, V
IH
= 2.5 V, V
IL
= 0 V
V
CC
= 3.3 V, C
L
= 50 pF, V
IH
= 3.3 V, V
IL
= 0 V
V
CC
= 2.5 V, C
L
= 30 pF, V
IH
= 2.5 V, V
IL
= 0 V
Min
Typ
0.8
0.6
−0.8
−0.6
Max
Units
V
V
V
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
C
IN
C
OUT
C
PD
Parameter
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
Condition
V
CC
= 3.3 V, V
I
= 0 V or V
CC
V
CC
= 3.3 V, V
I
= 0 V or V
CC
10 MHz, V
CC
= 3.3 V, V
I
= 0 V or V
CC
Typical
7
8
25
Units
pF
pF
pF
Vcc
Dn
t
s
CPn
Vmi
f
max
t
PLH
, t
PHL
On,
On
Vmo
V
OL
0V
t
h
t
w
Vcc
Vmi
0V
V
OH
WAVEFORM 1
−
PROPAGATION DELAYS, SETUP AND HOLD TIMES
t
R
= t
F
= 2.5 ns, 10% to 90%; f = 1 MHz; t
W
= 500 ns
Vcc
SDn
0V
Vcc
CDn
1.5 V
0V
t
PLH
On
Vmo
t
PHL
Vmo
V
OL
t
PLH
On
t
PHL
Vmo
Vmo
V
OH
WAVEFORM 2
−
PROPAGATION DELAYS
t
R
= t
F
= 2.5 ns, 10% to 90%; f = 1 MHz; t
W
= 500 ns
Figure 3. AC Waveforms
http://onsemi.com
5
京公网安备 11010802033920号
EEWORLD
