IDT723622L12PQFG datasheet, PDF

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IDT723622L12PQFG: DescriptionFIFO, 256X36, 8ns, Synchronous, CMOS, PQFP132, PLASTIC, QFP-132; Categorystorage storage; File Size219KB，25 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT723622L12PQFG Overview

FIFO, 256X36, 8ns, Synchronous, CMOS, PQFP132, PLASTIC, QFP-132

IDT723622L12PQFG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	BQFP,
Contacts	132
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	8 ns
Other features	MAILBOX
period time	12 ns
JESD-30 code	S-PQFP-G132
JESD-609 code	e3
length	24.13 mm
memory density	9216 bit
memory width	36
Number of functions	1
Number of terminals	132
word count	256 words
character code	256
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256X36
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	BQFP
Package shape	SQUARE
Package form	FLATPACK, BUMPER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	4.572 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.635 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	24.13 mm
Base Number Matches	1

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CMOS SyncBiFIFO

256 x 36 x 2, 512 x 36 x 2,

1,024 x 36 x 2

FEATURES:

•

IDT723622

IDT723632

IDT723642

•

Memory storage capacity:

IDT723622 – 256 x 36 x 2

IDT723632 – 512 x 36 x 2

IDT723642 – 1,024 x 36 x 2

Free-running CLKA and CLKB may be asynchronous or

coincident (simultaneous reading and writing of data on a single

clock edge is permitted)

Two independent clocked FIFOs buffering data in opposite

directions

Mailbox bypass register for each FIFO

Programmable Almost-Full and Almost-Empty flags

Microprocessor Interface Control Logic

IRA, ORA,

AEA,

and

AFA

flags synchronized by CLKA

IRB, ORB,

AEB,

and

AFB

flags synchronized by CLKB

Supports clock frequencies up to 83MHz

Fast access times of 8ns

Available in 132-pin Plastic Quad Flatpack (PQFP) or space-

saving 120-pin Thin Quad Flatpack (TQFP)

Low-power 0.8-Micron Advanced CMOS technology

Industrial temperature range (–40°C to +85°C) is available

DESCRIPTION:

The IDT723622/723632/723642 are a monolithic, high-speed, low-power,

CMOS Bidirectional SyncFIFO (clocked) memory which supports clock fre-

quencies up to 83MHz and have read access times as fast as 8ns. Two

independent 256/512/1,024 x 36 dual-port SRAM FIFOs on board each chip

buffer data in opposite directions. Communication between each port may

bypass the FIFOs via two 36-bit mailbox registers. Each mailbox register has

a flag to signal when new mail has been stored.

These devices are a synchronous (clocked) FIFO, meaning each port

employs a synchronous interface. All data transfers through a port are gated

to the LOW-to-HIGH transition of a port clock by enable signals. The clocks for

each port are independent of one another and can be asynchronous or

FUNCTIONAL BLOCK DIAGRAM

MBF1

CLKA

CSA

W/RA

ENA

MBA

Mail 1

Input

RAM

ARRAY

256 x 36

512 x 36

1,024 x 36

Output

Port-A

Control

Logic

RST1

FIFO1,

Mail1

Reset

Logic

Write

Pointer

Read

Pointer

ORB

AEB

IRA

AFA

FIFO 1

Status Flag

Logic

- A

ORA

AEA

Programmable Flag

Offset Registers

FIFO 2

- B

Status Flag

Logic

Write

Pointer

IRB

AFB

Read

Pointer

RAM

ARRAY

256 x 36

512 x 36

1,024 x 36

Mail 2

Output

FIFO2,

Mail2

Reset

Logic

Input

RST2

Port-B

Control

Logic

CLKB

CSB

W/RB

ENB

MBB

3022 drw 01

MBF2

IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. SyncBiFIFO is a trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE



DECEMBER 2001

DSC-3022/4

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