TL594
Precision Switchmode
Pulse Width Modulation
Control Circuit
The TL594 is a fixed frequency, pulse width modulation control
circuit designed primarily for Switchmode power supply control.
Features
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MARKING
DIAGRAMS
PDIP−16
N SUFFIX
CASE 648
1
•
•
•
•
•
•
•
•
•
Complete Pulse Width Modulation Control Circuitry
On−Chip Oscillator with Master or Slave Operation
On−Chip Error Amplifiers
On−Chip 5.0 V Reference, 1.5% Accuracy
Adjustable Deadtime Control
Uncommitted Output Transistors Rated to 500 mA Source or Sink
Output Control for Push−Pull or Single−Ended Operation
Undervoltage Lockout
Pb−Free Packages are Available*
16
TL594CN
AWLYYWWG
1
16
SO−16
D SUFFIX
CASE 751B
1
TL594CDG
AWLYWW
1
16
MAXIMUM RATINGS
Rating
Power Supply Voltage
Collector Output Voltage
Collector Output Current
(Each Transistor) (Note 1)
Amplifier Input Voltage Range
Power Dissipation @ T
A
≤
45°C
Thermal Resistance
Junction−to−Ambient (PDIP)
Junction−to−Air (TSSOP)
Junction−to−Ambient (SOIC)
Operating Junction Temperature
Storage Temperature Range
Operating Ambient Temperature Range
TL594CD, CN, CDTB
Derating Ambient Temperature
Symbol
V
CC
V
C1
,
V
C2
I
C1
, I
C2
V
IR
P
D
R
qJA
80
140
135
T
J
T
stg
T
A
−40 to 85
T
A
45
°C
125
−55 to +125
°C
°C
°C
Value
42
42
500
−0.3 to +42
1000
Unit
V
V
mA
V
mW
°C/W
1
TSSOP−16
DTB SUFFIX
CASE 948F
1
TL59
4DTB
ALYWG
G
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
Noninv
Input 1
Inv
Input 2
Compen/PWN
Comp Input 3
Deadtime
Control 4
C
T
5
Oscillator
+
Error 1
Amp
−
+
2 Error
Amp
−
V
CC
≈
0.1 V
5.0 V
REF
Noninv
16 Input
Inv
15 Input
14 V
ref
Output
13 Control
12 V
CC
11 C2
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Maximum thermal limits must be observed.
R
T
6
Q2
Ground 7
C1 8
Q1
10 E2
9 E1
(Top View)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2005
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
1
November, 2005 − Rev. 5
Publication Order Number:
TL594/D
TL594
RECOMMENDED OPERATING CONDITIONS
Characteristics
Power Supply Voltage
Collector Output Voltage
Collector Output Current (Each transistor)
Amplified Input Voltage
Current Into Feedback Terminal
Reference Output Current
Timing Resistor
Timing Capacitor
Oscillator Frequency
PWM Input Voltage (Pins 3, 4, 13)
Symbol
V
CC
V
C1
, V
C2
I
C1
, I
C2
V
in
l
fb
l
ref
R
T
C
T
f
osc
−
Min
7.0
−
−
0.3
−
−
1.8
0.0047
1.0
0.3
Typ
15
30
−
−
−
−
30
0.001
40
−
Max
40
40
200
V
CC
− 2.0
0.3
10
500
10
300
5.3
Unit
V
V
mA
V
mA
mA
kW
mF
kHz
V
ELECTRICAL CHARACTERISTICS
(V
CC
= 15 V, C
T
= 0.01
mF,
R
T
= 12 kW, unless otherwise noted.)
For typical values T
A
= 25°C, for min/max values T
A
is the operating ambient temperature range that applies, unless otherwise noted.
Characteristics
REFERENCE SECTION
Reference Voltage
(I
O
= 1.0 mA, T
A
= 25°C)
(I
O
= 1.0 mA)
Line Regulation (V
CC
= 7.0 V to 40 V)
Load Regulation (I
O
= 1.0 mA to 10 mA)
Short Circuit Output Current (V
ref
= 0 V)
OUTPUT SECTION
Collector Off−State Current (V
CC
= 40 V, V
CE
= 40 V)
Emitter Off−State Current (V
CC
= 40 V, V
C
= 40 V, V
E
= 0 V)
Collector−Emitter Saturation Voltage (Note 1)
Common−Emitter (V
E
= 0 V, I
C
= 200 mA)
Emitter−Follower (V
C
= 15 V, I
E
= −200 mA)
Output Control Pin Current
Low State (V
OC
≤
0.4 V)
High State (V
OC
= V
ref
)
Output Voltage Rise Time
Common−Emitter (See Figure 13)
Emitter−Follower (See Figure 14)
Output Voltage Fall Time
Common−Emitter (See Figure 13)
Emitter−Follower (See Figure 14)
ERROR AMPLIFIER SECTION
Input Offset Voltage (V
O (Pin 3)
= 2.5 V)
Input Offset Current (V
O (Pin 3)
= 2.5 V)
Input Bias Current (V
O (Pin 3)
= 2.5 V)
Input Common Mode Voltage Range (V
CC
= 40 V, T
A
= 25°C)
Inverting Input Voltage Range
Open Loop Voltage Gain (DV
O
= 3.0 V, V
O
= 0.5 V to 3.5 V, R
L
= 2.0 kW)
Unity−Gain Crossover Frequency (V
O
= 0.5 V to 3.5 V, R
L
= 2.0 kW)
Phase Margin at Unity−Gain (V
O
= 0.5 V to 3.5 V, R
L
= 2.0 kW)
Common Mode Rejection Ratio (V
CC
= 40 V)
Power Supply Rejection Ratio (DV
CC
= 33 V, V
O
= 2.5 V, R
L
= 2.0 kW)
Output Sink Current (V
O (Pin 3)
= 0.7 V)
Output Source Current (V
O (Pin 3)
= 3.5 V)
V
IO
I
IO
I
IB
V
ICR
V
IR(INV)
A
VOL
f
C
φm
CMRR
PSRR
I
O
−
I
O
+
70
−
−
65
−
0.3
−2.0
−
−
−
2.0
5.0
−0.1
0 to V
CC
−2.0
−0.3 to V
CC
−2.0
95
700
65
90
100
0.7
−4.0
−
−
−
−
−
−
−
10
250
−1.0
mV
nA
mA
V
V
dB
kHz
deg.
dB
dB
mA
mA
I
C(off)
I
E(off)
V
SAT(C)
V
SAT(E)
I
OCL
I
OCH
t
r
−
−
t
f
−
−
40
40
100
100
100
100
200
200
ns
−
−
−
−
−
−
2.0
−
1.1
1.5
0.1
2.0
100
−100
1.3
2.5
mA
−
20
ns
mA
mA
V
V
ref
4.925
4.9
Reg
line
Reg
load
I
SC
−
−
15
5.0
−
2.0
2.0
40
5.075
5.1
25
15
75
mV
mV
mA
V
Symbol
Min
Typ
Max
Unit
1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
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2
TL594
ELECTRICAL CHARACTERISTICS
(V
CC
= 15 V, C
T
= 0.01
mF,
R
T
= 12 kW, unless otherwise noted.)
For typical values T
A
= 25°C, for min/max values T
A
is the operating ambient temperature range that applies, unless otherwise noted.
Characteristics
PWM COMPARATOR SECTION
(Test Circuit Figure 11)
Input Threshold Voltage (Zero Duty Cycle)
Input Sink Current (V
Pin 3
= 0.7 V)
DEADTIME CONTROL SECTION
(Test Circuit Figure 11)
Input Bias Current (Pin 4) (V
Pin 4
= 0 V to 5.25 V)
Maximum Duty Cycle, Each Output, Push−Pull Mode
(V
Pin 4
= 0 V, C
T
= 0.01
mF,
R
T
= 12 kW)
(V
Pin 4
= 0 V, C
T
= 0.001
mF,
R
T
= 30 kW)
Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)
OSCILLATOR SECTION
Frequency
(C
T
= 0.001
mF,
R
T
= 30 kW)
(C
T
= 0.01
mF,
R
T
= 12 kW, T
A
= 25°C)
(C
T
= 0.01
mF,
R
T
= 12 kW, T
A
= T
low
to T
high
)
Standard Deviation of Frequency* (C
T
= 0.001
mF,
R
T
= 30 kW)
Frequency Change with Voltage (V
CC
= 7.0 V to 40 V, T
A
= 25°C)
Frequency Change with Temperature
(DT
A
= T
low
to T
high
, C
T
= 0.01
mF,
R
T
= 12 kW)
UNDERVOLTAGE LOCKOUT SECTION
Turn−On Threshold (V
CC
Increasing, I
ref
= 1.0 mA)
T
A
= 25°C
T
A
= T
low
to T
high
Hysteresis
TL594C,I
TL594M
TOTAL DEVICE
Standby Supply Current (Pin 6 at V
ref
, All other inputs and outputs open)
(V
CC
= 15 V)
(V
CC
= 40 V)
Average Supply Current (V
Pin 4
= 2.0 V, C
T
= 0.01
mF,
R
T
= 12 kW,
V
CC
= 15 V, See Figure 11)
I
CC
−
−
−
8.0
8.0
11
15
18
mA
−
mA
V
th
4.0
3.5
V
H
100
50
150
150
300
300
5.2
−
6.0
6.5
mV
V
f
osc
−
9.2
9.0
σf
osc
Df
osc
(DV)
Df
osc
(DT)
−
−
−
40
10
−
1.5
0.2
4.0
−
10.8
12
−
1.0
−
%
%
%
kHz
I
IB (DT)
DC
max
45
−
V
TH
−
0
2.8
−
3.3
−
48
45
50
−
V
−
−2.0
−10
mA
%
V
TH
I
I−
−
0.3
3.6
0.7
4.5
−
V
mA
Symbol
Min
Typ
Max
Unit
*Standard deviation is a measure of the statistical distribution about the mean as derived from the formula,
σ
N
Σ
(X
n
− X)
2
n=1
N−1
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3
TL594
Output Control
13
6
Oscillator
R
T
C
T
5
−
+
4
Deadtime
Control
≈
0.7V
−
+
0.7mA
+
1
−
1
2
3
Feedback PWM
Comparator Input
2
PWM
Comparator
+
−
15
16
UV
Lockout
−
+
−
+
3.5V
14
Ref.
Output
7
Gnd
4.9V
Reference
Regulator
12
V
CC
Deadtime
Comparator
Ck
D
Flip−
Flop
Q
Q2 11
10
Q
Q1
8
9
V
CC
≈
0.12V
Error Amp
1
Error Amp
2
This device contains 46 active transistors.
Figure 1. Representative Block Diagram
Capacitor C
T
Feedback/PWM Comp.
Deadtime Control
Flip−Flop
Clock Input
Flip−Flop
Q
Flip−Flop
Q
Output Q1
Emitter
Output Q2
Emitter
Output
Control
Figure 2. Timing Diagram
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4
TL594
APPLICATIONS INFORMATION
Description
The TL594 is a fixed−frequency pulse width modulation
control circuit, incorporating the primary building blocks
required for the control of a switching power supply. (See
Figure 1) An internal−linear sawtooth oscillator is frequency−
programmable by two external components, R
T
and C
T
. The
approximate oscillator frequency is determined by:
f
osc
≈
1.1
R
T
•
C
T
common−mode input range from −0.3 V to (V
CC
− 2 V), and
may be used to sense power−supply output voltage and
current. The error−amplifier outputs are active high and are
ORed together at the noninverting input of the pulse−width
modulator comparator. With this configuration, the
amplifier that demands minimum output on time, dominates
control of the loop.
Functional Table
Input/Output
Controls
Grounded
@ V
ref
Output Function
Single−ended PWM @ Q1 and Q2
Push−pull Operation
f
out
f
osc
=
1.0
0.5
For more information refer to Figure 3.
Output pulse width modulation is accomplished by
comparison of the positive sawtooth waveform across
capacitor C
T
to either of two control signals. The NOR gates,
which drive output transistors Q1 and Q2, are enabled only
when the flip−flop clock−input line is in its low state. This
happens only during that portion of time when the sawtooth
voltage is greater than the control signals. Therefore, an
increase in control−signal amplitude causes a corresponding
linear decrease of output pulse width. (Refer to the Timing
Diagram shown in Figure 2.)
The control signals are external inputs that can be fed into
the deadtime control, the error amplifier inputs, or the
feedback input. The deadtime control comparator has an
effective 120 mV input offset which limits the minimum
output deadtime to approximately the first 4% of the
sawtooth−cycle time. This would result in a maximum duty
cycle on a given output of 96% with the output control
grounded, and 48% with it connected to the reference line.
Additional deadtime may be imposed on the output by
setting the deadtime−control input to a fixed voltage,
ranging between 0 V to 3.3 V.
The pulse width modulator comparator provides a means
for the error amplifiers to adjust the output pulse width from
the maximum percent on−time, established by the deadtime
control input, down to zero, as the voltage at the feedback
pin varies from 0.5 V to 3.5 V. Both error amplifiers have a
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
f OSC, OSCILLATOR FREQUENCY (Hz)
500 k
C
T
= 0.001
mF
V
CC
= 15 V
When capacitor C
T
is discharged, a positive pulse is
generated on the output of the deadtime comparator, which
clocks the pulse−steering flip−flop and inhibits the output
transistors, Q1 and Q2. With the output−control connected
to the reference line, the pulse−steering flip−flop directs the
modulated pulses to each of the two output transistors
alternately for push−pull operation. The output frequency is
equal to half that of the oscillator. Output drive can also be
taken from Q1 or Q2, when single−ended operation with a
maximum on−time of less than 50% is required. This is
desirable when the output transformer has a ringback
winding with a catch diode used for snubbing. When higher
output−drive currents are required for single−ended
operation, Q1 and Q2 may be connected in parallel, and the
output−mode pin must be tied to ground to disable the
flip−flop. The output frequency will now be equal to that of
the oscillator.
The TL594 has an internal 5.0 V reference capable of
sourcing up to 10 mA of load current for external bias
circuits. The reference has an internal accuracy of
±1.5%
with a typical thermal drift of less than 50 mV over an
operating temperature range of 0° to 70°C.
100 k
10 k
0.01
mF
1.0 k
500
1.0 k 2.0 k 5.0 k
0.1
mF
10 k 20 k 50 k
100 k 200 k
R
T,
TIMING RESISTANCE (W)
500 k 1.0 M
120
110
100
90
80
70
60
50
40
30
20
10
0
1.0
V
CC
= 15 V
DV
O
= 3.0 V
R
L
= 2.0 kW
A
VOL
10
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
0
20
40
60
80
φ
100
120
140
160
180
1.0 M
Figure 3. Oscillator Frequency versus
Timing Resistance
Figure 4. Open Loop Voltage Gain and
Phase versus Frequency
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φ
, EXCESS PHASE (DEGREES)
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