SNC21040
1-CH H.Q. Speech Controller
===================== CONTENTS =====================
1.
2.
3.
4.
5.
INTRODUCTION............................................................................................................3
FEATURES ......................................................................................................................3
PIN ASSIGNMENT.........................................................................................................4
BLOCK DIAGRAM ........................................................................................................4
FUNCTION DESCRIPTIONS .......................................................................................5
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.11
5.12
6.
7.
8.
O
SCILLATOR
...............................................................................................................5
ROM ..........................................................................................................................5
RAM ..........................................................................................................................5
P
OWER
D
OWN
M
ODE
..................................................................................................5
S
AMPLING
R
ATE
C
OUNTER
.........................................................................................5
I/O P
ORTS
...................................................................................................................6
IR F
UNCTION
..............................................................................................................6
PWM IO
CONTROL
.....................................................................................................6
W
ATCH
D
OG
T
IMER
....................................................................................................6
P
USH
-P
ULL
O
UTPUT
...................................................................................................7
M
ARK REGISTER
.........................................................................................................7
L
OW
V
OLTAGE
H
OLD
.................................................................................................7
ABSOLUTE MAXIMUM RATING ..............................................................................8
ELECTRICAL CHARACTERISTICS .........................................................................8
APPLICATION CIRCUIT .............................................................................................9
Ver: 1.0
1
November 08, 2006
SNC21040
1-CH H.Q. Speech Controller
AMENDENT HISTORY
Version
Ver 1.0
Date
November 08, 2006
First issue
Description
Ver: 1.0
2
November 08, 2006
SNC21040
1-CH H.Q. Speech Controller
1. INTRODUCTION
SNC21040 is a one-channel voice synthesizer IC with Push-Pull direct drive circuit. It
built in a 4-bit tiny controller with three 4-bit I/O ports. By programming through the tiny
controller in SNC21040, user’s varied applications including voice section combination,
key trigger arrangement, output control, and other logic functions can be easily
implemented.
2. FEATURES
Single power supply 2.4V – 5.5V
System Clock is 2MHz, the instruction cycle is 4us
40 seconds voice capacity are provided (@6KHZ sample rate)
Built in a 4-bit tiny controller
I/O Port
Three 4-bit I/O ports P1, P2 and P3 are provided
The driving/sink current of P3.2 & P3.3 is up to 8mA/16mA
The IO pins P3.3 or P2.3 can be modulated with 38.5Khz carry signal to
implement IR function.
PWM output for IO (P3.0~P3.3)
128*4 bits RAM are provided
Maximum 16k program ROM is provided
128K*10 shared ROM for voice data and program
Readable ROM code data
Built-in one channel High Quality speech synthesizer
Adaptive playing speed from 2.5k-20kHz is provided
Automatic repetition
Support 5-bit ADPCM and 10 bit PCM format
Built in an 8-level volume control Push-Pull Direct Drive circuit output, can directly
connected to Speaker for sound output
Push-Pull DAC with 12 bits resolution (Direct Drive)
Event Mark function supported
Low-Voltage Detect circuit
Watch Dog Timer Reset function.
Ver: 1.0
3
November 08, 2006
SNC21040
1-CH H.Q. Speech Controller
3. PIN ASSIGNMENT
Symbol
P10~P13
P20~P23
P30~P33
RST
TEST
FUSEPAD
OSC
RCSEL
DAON
DAOP
VDD
GND
I/O
I/O
I/O
I/O
I
I
I
I
I
O
O
P
P
Function Description
I/O port 1: IO
I/O port 2: IO
I/O port 3: IO
Reset Chip (Active H)
Test pin
Fuse mode selection pad
The test mode clock input pad or OSC
Ring OSC R selection
Push-Pull output 1
Push-Pull output 2
Positive power supply
Negative power supply
4. Block Diagram
ROM
Program/Speech
Address Pointers/ STACK
SRAM (128 nibbles)
Timing
Generator
OSC
Sampling Rate Counter
Voice
Synthesizer
PWM IO
Watch Dog
Timer
Push-Pull
Circuit
Timer
ALU
IO port 1
IO port 2
IO port 3
Ver: 1.0
4
November 08, 2006
SNC21040
1-CH H.Q. Speech Controller
5. FUNCTION DESCRIPTIONS
5.1
Oscillator
System clock define 2 Mhz, the souce provided by internal R-type ring oscillator or
external resistor ring oscillator. This option is controlled by pin, RCSEL.
RCSEL = 1 using the external R 180Kohm
RCSEL = 0 using the internal R
5.2
ROM
SNC21040 contains a substantial maximum 128K words (10-bit) internal ROM, which
is shared by program and resource data. Program, voice and data are shared within
this same 128K words ROM.
5.3
RAM
SNC21040 contains maximum 128 nibble RAM (128 x 4-bits). The 128 nibble RAM is
divided into eight pages (page 0 to page 7, 16 nibble RAM on each page). In our
programming structure, users can use the instructions, PAGE n (n=0 to 7) to switch
and indicate the RAM page. Besides, users can use direct mode, M0 ~ M15 in the
data transfer type instructions, to access all 16 nibbles of each page.
5.4
Power Down Mode
“End” instruction makes the IC entering into Stop Mode will stop the system clock for
power savings (<3uA @VDD=3V and <6uA @VDD=4.5V.) Any valid data transition
(L H or H L) occurring on any IO pin can be used to start the system clock and
return to normal operating mode.
5.5
Sampling Rate Counter
The unique sampling rate counter is designed in voice channel to be able to play
diverse voices at different sample playing rates. The playing rate can be adaptively set
up among from the wide ranges of 2.5KHz to 20KHz. This architecture yields a
high-quality voice synthesis that sounds very close to its original source when played
through the same amplifier and speaker circuitry.
Ver: 1.0
5
November 08, 2006
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