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IS61LV3216L-10T

Description
32K X 16 STANDARD SRAM, 12 ns, PDSO44
Categorystorage   
File Size102KB,8 Pages
ManufacturerISSI(Integrated Silicon Solution Inc.)
Websitehttp://www.issi.com/
Download Datasheet Parametric View All

IS61LV3216L-10T Overview

32K X 16 STANDARD SRAM, 12 ns, PDSO44

IS61LV3216L-10T Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals44
Maximum operating temperature85 Cel
Minimum operating temperature-40 Cel
Maximum supply/operating voltage3.63 V
Minimum supply/operating voltage3.14 V
Rated supply voltage3.3 V
maximum access time12 ns
Processing package descriptionPLASTIC, TSOP2-44
stateACTIVE
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE, THIN PROFILE
surface mountYes
Terminal formGULL WING
Terminal spacing0.8000 mm
terminal coatingTIN LEAD
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelINDUSTRIAL
memory width16
organize32K X 16
storage density524288 deg
operating modeASYNCHRONOUS
Number of digits32768 words
Number of digits32K
Memory IC typeSTANDARD SRAM
serial parallelPARALLEL
IS61LV3216L
32K x 16 LOW VOLTAGE CMOS STATIC RAM
FEATURES
• High-speed access time: 10, 12, 15, and 20 ns
• CMOS low power operation
— 130 mW (typical) operating
— 150 µW (typical) standby
• TTL compatible interface levels
• Single 3.3V + 10%, –5% power supply for 10
and 12 ns
• Single 3.3V ± 10% power supply for 15
and 20 ns
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
• Available in 44-pin 400-mil SOJ package and
44-pin TSOP (Type II)
ISSI
®
DECEMBER 2000
DESCRIPTION
The
ISSI
IS61LV3216L is a high-speed, 512K static RAM
organized as 32,768 words by 16 bits. It is fabricated using
ISSI
's high-performance CMOS technology. This highly reli-
able process coupled with innovative circuit design tech-
niques, yields fast access times with low power consumption.
When
CE
is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down to
150 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE
and
OE.
The active LOW Write
Enable (WE) controls both writing and reading of the memory.A
data byte allows Upper Byte (UB) and Lower Byte (LB) access.
The IS61LV3216L is packaged in the JEDEC standard 44-pin
400-mil SOJ and 44-pin TSOP (Type II).
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
32K x 16
MEMORY ARRAY
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
12/19/00
1

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