ATMEGA169P_06 datasheet, PDF - EEWORLD Datasheet

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ATMEGA169P_06: Description8-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQFP64; Categorysemiconductor The embedded processor and controller; File Size240KB，21 Pages; ManufacturerAtmel (Microchip)

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ATMEGA169P_06 Overview

8-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQFP64

ATMEGA169P_06 Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	64
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	5.5 V
Minimum supply/operating voltage	1.8 V
Rated supply voltage	2.4 V
External data bus width	0.0
Number of input and output buses	54
Line speed	8 MHz
Processing package description	14 × 14 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026AEB, TQFP-64
Lead-free	Yes
EU RoHS regulations	Yes
state	ACTIVE
Craftsmanship	CMOS
packaging shape	SQUARE
Package Size	FLATPACK, THIN PROFILE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.8000 mm
terminal coating	MATTE Tin
Terminal location	Four
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
ADC channel	Yes
Address bus width	0.0
Number of digits	8
Maximum FCLK clock frequency	8 MHz
DAC channel	Yes
Microprocessor type	Reduced Instruction Set Microcontroller
PWM channel	Yes
ROM programming	FLASH

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Features

•

High Performance, Low Power AVR

8-Bit Microcontroller

•

Advanced RISC Architecture

– 130 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 16 MIPS Throughput at 16 MHz

– On-Chip 2-cycle Multiplier

Non-volatile Program and Data Memories

– 16K bytes of In-System Self-Programmable Flash

Endurance: 10,000 Write/Erase Cycles

– Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

– 512 bytes EEPROM

Endurance: 100,000 Write/Erase Cycles

– 1K byte Internal SRAM

– Programming Lock for Software Security

JTAG (IEEE std. 1149.1 compliant) Interface

– Boundary-scan Capabilities According to the JTAG Standard

– Extensive On-chip Debug Support

– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface

Peripheral Features

– 4 x 25 Segment LCD Driver

– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture

Mode

– Real Time Counter with Separate Oscillator

– Four PWM Channels

– 8-channel, 10-bit ADC

– Programmable Serial USART

– Master/Slave SPI Serial Interface

– Universal Serial Interface with Start Condition Detector

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated Oscillator

– External and Internal Interrupt Sources

– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and

Standby

I/O and Packages

– 54 Programmable I/O Lines

– 64-lead TQFP and 64-pad QFN/MLF

Speed Grade:

– ATmega169PV: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.7 - 5.5V

– ATmega169P: 0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V

Temperature range:

– -40°C to 85°C Industrial

Ultra-Low Power Consumption

– Active Mode:

1 MHz, 1.8V: 330 µA

32 kHz, 1.8V: 10 µA (including Oscillator)

32 kHz, 1.8V: 25 µA (including Oscillator and LCD)

– Power-down Mode:

0.1 µA at 1.8V

– Power-save Mode:

0.6 µA at 1.8V(Including 32 kHz RTC)

•

8-bit

Microcontroller

with 16K Bytes

In-System

Programmable

Flash

ATmega169P

ATmega169PV

Preliminary

Summary

•

8018IS-AVR-11/06

The AVR core combines a rich instruction set with 32 general purpose working registers. All the

32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent

registers to be accessed in one single instruction executed in one clock cycle. The resulting

architecture is more code efficient while achieving throughputs up to ten times faster than con-

ventional CISC microcontrollers.

The ATmega169P provides the following features: 16K bytes of In-System Programmable Flash

with Read-While-Write capabilities, 512 bytes EEPROM, 1K byte SRAM, 53 general purpose I/O

lines, 32 general purpose working registers, a JTAG interface for Boundary-scan, On-chip

Debugging support and programming, a complete On-chip LCD controller with internal step-up

voltage, three flexible Timer/Counters with compare modes, internal and external interrupts, a

serial programmable USART, Universal Serial Interface with Start Condition Detector, an 8-

channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an SPI serial

port, and five software selectable power saving modes. The Idle mode stops the CPU while

allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The

Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip

functions until the next interrupt or hardware reset. In Power-save mode, the asynchronous

timer and the LCD controller continues to run, allowing the user to maintain a timer base and

operate the LCD display while the rest of the device is sleeping. The ADC Noise Reduction

mode stops the CPU and all I/O modules except asynchronous timer, LCD controller and ADC,

to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator

Oscillator is running while the rest of the device is sleeping. This allows very fast start-up com-

bined with low-power consumption.

The device is manufactured using Atmel’s high density non-volatile memory technology. The

On-chip ISP Flash allows the program memory to be reprogrammed In-System through an SPI

serial interface, by a conventional non-volatile memory programmer, or by an On-chip Boot pro-

gram running on the AVR core. The Boot program can use any interface to download the

application program in the Application Flash memory. Software in the Boot Flash section will

continue to run while the Application Flash section is updated, providing true Read-While-Write

operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a

monolithic chip, the Atmel ATmega169P is a powerful microcontroller that provides a highly flex-

ible and cost effective solution to many embedded control applications.

The ATmega169P AVR is supported with a full suite of program and system development tools

including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators,

and Evaluation kits.

ATmega169P

8018IS–AVR–11/06

ATmega169P

2.2

2.2.1

Pin Descriptions

VCC

Digital supply voltage.

2.2.2

GND

Ground.

2.2.3

Port A (PA7:PA0)

Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port A output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port A also serves the functions of various special features of the ATmega169P as listed on

”Alternate Functions of Port A” on page 72.

2.2.4

Port B (PB7:PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port B has better driving capabilities than the other ports.

Port B also serves the functions of various special features of the ATmega169P as listed on

”Alternate Functions of Port B” on page 73.

2.2.5

Port C (PC7:PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port C output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port C also serves the functions of special features of the ATmega169P as listed on

”Alternate

Functions of Port C” on page 76.

2.2.6

Port D (PD7:PD0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port D output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port D also serves the functions of various special features of the ATmega169P as listed on

”Alternate Functions of Port D” on page 78.

8018IS–AVR–11/06

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