S1C63158D0A010H datasheet, PDF

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S1C63158D0A010H: Description4-BIT, FLASH, 4MHz, MICROCONTROLLER, UUC53, DIE-53; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，159 Pages; ManufacturerSeiko Epson Corporation

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S1C63158D0A010H Overview

4-BIT, FLASH, 4MHz, MICROCONTROLLER, UUC53, DIE-53

S1C63158D0A010H Parametric

Parameter Name	Attribute value
Maker	Seiko Epson Corporation
Parts packaging code	DIE
package instruction	DIE,
Contacts	53
Reach Compliance Code	unknown
Has ADC	NO
Address bus width
bit size	4
maximum clock frequency	4 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	X-XUUC-N53
Number of terminals	53
Maximum operating temperature	70 °C
Minimum operating temperature	-20 °C
PWM channel	YES
Package body material	UNSPECIFIED
encapsulated code	DIE
Package shape	UNSPECIFIED
Package form	UNCASED CHIP
Certification status	Not Qualified
ROM programmability	FLASH
speed	4 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	2.1 V
Nominal supply voltage	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal location	UPPER
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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CMOS 4-BIT SINGLE CHIP MICROCOMPUTER

S1C63808

Technical Manual

CONTENTS

ONTENTS

CHAPTER

1 O

UTLINE

________________________________________________ 1

1.1

1.2

1.3

1.4

1.5

Features ......................................................................................................... 1

Block Diagram .............................................................................................. 2

Pin Layout Diagram ..................................................................................... 3

Pin Description ............................................................................................. 4

Mask Option .................................................................................................. 5

CHAPTER

2 P

OWER

UPPLY AND

NITIAL

ESET

____________________________ 8

2.1

Power Supply ................................................................................................ 8

2.1.1 Voltage regulator for OSC1 oscillation circuit .......................................... 8

2.1.2 Voltage regulator for the internal logic system ......................................... 8

2.1.3 EPD system voltage circuit ........................................................................ 8

2.2

Initial Reset ................................................................................................... 9

2.2.1 Reset terminal (RESET) ............................................................................. 9

2.2.2 Simultaneous high input to terminals K00–K03 ...................................... 10

2.2.3 Oscillation-detect circuit ........................................................................... 10

2.2.4 Internal register at initial resetting ........................................................... 10

2.2.5 Terminal settings at initial resetting ......................................................... 11

2.3

CHAPTER

Test Terminal (TEST) ................................................................................... 11

3 CPU, ROM, RAM ________________________________________ 12

3.1

3.2

3.3

CPU .............................................................................................................. 12

Code ROM .................................................................................................... 12

RAM ............................................................................................................. 12

CHAPTER

4 P

ERIPHERAL

IRCUITS AND

PERATION

__________________________ 14

4.1

4.2

Memory Map ................................................................................................ 14

Watchdog Timer ........................................................................................... 22

4.2.1 Configuration of watchdog timer .............................................................. 22

4.2.2 Interrupt function ...................................................................................... 22

4.2.3 I/O memory of watchdog timer ................................................................. 23

4.2.4 Programming notes ................................................................................... 23

4.3

Oscillation Circuit ....................................................................................... 24

4.3.1 Configuration of oscillation circuit .......................................................... 24

4.3.2 OSC1 oscillation circuit ............................................................................ 24

4.3.3 OSC3 oscillation circuit ............................................................................ 25

4.3.4 Switching of CPU clock ............................................................................ 26

4.3.5 Clock frequency and instruction execution time ....................................... 26

4.3.6 I/O memory of oscillation circuit .............................................................. 27

4.3.7 Programming notes ................................................................................... 27

4.4

Input Ports (K00–K03 and K10–K13) ......................................................... 28

4.4.1 Configuration of input ports ..................................................................... 28

4.4.2 Interrupt function ...................................................................................... 28

4.4.3 Mask option ............................................................................................... 29

4.4.4 I/O memory of input ports ......................................................................... 30

4.4.5 Programming notes ................................................................................... 32

S1C63808 TECHNICAL MANUAL

EPSON

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