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EDI8L32512C15AI

Description
SRAM Module, 512KX32, 15ns, CMOS, PQCC68, PLASTIC, MO-47AE, LCC-68
Categorystorage    storage   
File Size119KB,8 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
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EDI8L32512C15AI Overview

SRAM Module, 512KX32, 15ns, CMOS, PQCC68, PLASTIC, MO-47AE, LCC-68

EDI8L32512C15AI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionPLASTIC, MO-47AE, LCC-68
Reach Compliance Codeunknown
Maximum access time15 ns
I/O typeCOMMON
JESD-30 codeS-PQCC-J68
JESD-609 codee0
length24.2316 mm
memory density16777216 bit
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of terminals68
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize512KX32
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC68,1.0SQ
Package shapeSQUARE
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height4.572 mm
Maximum standby current0.04 A
Minimum standby current4.75 V
Maximum slew rate0.8 mA
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width24.2316 mm
Base Number Matches1
White Electronic Designs
512Kx32 CMOS High Speed Static RAM
FEATURES
DSP Memory Solution
Motorola DSP96002
Analog SHARC DSP
Texas Instruments TMS320C3x, TMS320C4x
Random Access Memory Array
Fast Access Times: 12*, 15, 17, and 20ns
TTL Compatible I/O
Fully Static, No Clocks
Surface Mount Package
68 Lead PLCC, No. 99 JEDEC M0-47AE
Small Footprint, 0.990 Sq. In.
Multiple Ground Pins for Maximum Noise Immunity
Single +5V (±5%) Supply Operation
* Advanced Information
EDI8L32512C
DESCRIPTION
The EDI8L32512C is a high speed, 5V, 16Mb SRAM. The
device is available with access times of 12, 15, 17 and
20ns allowing the creation of a no wait state DSP memory
solution. The high speed, 5v supply voltage and control lines
make the divice ideal for creating floating point DSP memory
solutions.
The device can be configured as a 512K x 32 and used to
create a single chip external data memory solution for TI's
TMS320C30/C31 (Figure 8), TMS320C32 (Figure 9) or
TMS320C4x (Figure 10), Motorola's DSP96002 and Analog's
SHARC DSP (Figure 11). Alternatively, the device's chip
enables can be used to configure it as a 1M x 16. A 1M x 48
program memory array for Analog's SHARC DSP is created
using three devices (Figure 12). If this memory is too deep,
two 512K x 24s (EDI8L24512C) can be used to create a 512K
x 48 array or two 128K x 48 array.
The device provides a 56% space savings when compared
to four 512K x 8, 36 pin SOJs. In addition the EDI8L32512C
has only a 10pF load on the data lines vs. 32pF for four
plastic SOJs.
The device provides a memory upgrade of the EDI8L32256C
(256K x 32) or the EDI8L32128C (128K x 32). For additional
upgrade information see Figure 13.
Note: Solder Reflow Temperature should not exceed 230°C for 10 seconds.
FIG. 1 PIN CONFIGURATIONS AND BLOCK DIAGRAM
DQ16
A18
A17
E3#
E2#
E1#
E0#
NC
VCC
NC
NC
G#
W#
A16
A15
A14
DQ15
PIN NAMES
A0-A18
E0#-E3#
W#
G#
DQ0-DQ31
V
CC
V
SS
NC
Address Inputs
Chip Enables
Write Enables
Output Enable
Common Data Input/Output
Power (+5V ±10%)
Ground
No Connection
BYTE CONTROL
TABLE
Chip
Enable
E0#
E1#
E2#
E3#
Byte
Control
DQ0-7
DQ8-15
DQ16-23
DQ24-31
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
DQ17 10
DQ18 11
DQ19 12
V
SS
13
DQ20 14
DQ21 15
DQ22 16
DQ23 17
V
CC
18
DQ24 19
DQ25 20
DQ26 21
DQ27 22
V
SS
23
DQ28 24
DQ29 25
DQ30 26
DQ14
DQ13
DQ12
V
SS
DQ11
DQ10
DQ9
DQ8
V
CC
DQ7
DQ6
DQ5
DQ4
V
SS
DQ3
DQ2
DQ1
A0-18
19
G#
W#
E0#
E1#
E2#
E3#
512K x 32
Memory
Array
Note: For memory upgrade information, refer to Pg 8, Fig 13 "EDI MCM-L Upgrade Path"
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2000
Rev. 7
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
DQ31
A6
A5
A4
A3
A2
A1
A0
V
CC
A13
A12
A11
A10
A9
A8
A7
DQ0
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31

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