Features
•
•
•
•
•
Pulse-width Modulation up to 2-kHz Clock Frequency
Protection Against Short-circuit, Load-dump Overvoltage and Reverse V
S
Duty Cycle 0% to 100% Continuously
Output Stage for Power MOSFET
Interference and Damage Protection According to VDE 0839 and
ISO/TR 7637/1
•
Charge-pump Noise Suppressed
•
Ground-wire Breakage Protection
1. Description
The U6084B is a PWM-IC with bipolar technology designed for the control of an
N-channel power MOSFET used as a high-side switch. The IC is ideal for use in the
brightness control (dimming) of lamps such as in dashboard applications. For constant
brightness, the preselected duty cycle can be reduced automatically as a function of
the supply voltage.
PWM Power
Control with
Automatic
Duty-cycle
Reduction
U6084B
Figure 1-1.
Block Diagram with External Circuit
C
5
16
9
Short circuit
latch monitoring
5
RC oscillator
6
Charge 13
pump
PWM
Logic
3
Control input
Output
C
3
47 nF
14
11
Current monitoring
+ short circuit detection
12
R
sh
V
Batt
V
S
C
1
47 kΩ
C
2
Duty cycle
range
0-100%
Duty cycle
reduction
4
Voltage
monitoring
1
Enable/
disable
2
150
Ω
R
3
Ground
.
Rev. 4677C–AUTO–09/05
2. Pin Configuration
Figure 2-1.
Pinning SO16
GND
EN/DIS
VI
REDUCT
NC
OSC
NC
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VS
NC
OUTPUT
2 VS
SENSE
DELAY
NC
LATCH
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Description
Symbol
GND
EN/DIS
VI
REDUCT
NC
OSC
NC
NC
LATCH
NC
DELAY
SENSE
2VS
OUTPUT
NC
VS
Function
IC ground
Enable/disable
Control input (duty cycle)
Duty cycle reduction
Attenuation
Oscillator
Not connected
Not connected
Status short-circuit latch
Not connected
Short-circuit protection delay
Current sensing
Voltage doubler
Output
Not connected
Supply voltage V
S
2
U6084B
4677C–AUTO–09/05
U6084B
3. Functional Description
3.1
3.1.1
Pin1 – GND
Ground-wire Breakage
To protect the FET in case of ground-wire breakage, a 820-kΩ resistor between gate and source
is recommended to provide proper switch-off conditions.
3.2
Pin 2 – Enable/Disable
The dimmer can be switched on or off with pin 2, independently of the set duty cycle.
Table 3-1.
V
2
> approximately 0.7V or open
< 0.7V or connected to pin 1
Pin 2 Function
Function
Disable
Enable
3.3
Pin 3 – Control Input
The pulse width is controlled by means of an external potentiometer (47 kΩ). The characteristic
(angle of rotation/duty cycle) is linear. The duty cycle be varied from 0% to 100%. It is possible to
further restrict the duty cycle with resistors R
1
and R
2
(Figure
7-1 on page 9).
Pin 3 is protected against short-circuit to V
Batt
and ground GND (V
Batt
≤
16.5V).
3.4
Pin 4 – Duty Cycle Reduction
With pin 4 connected according to
Figure 7-1 on page 9,
the set duty cycle is reduced to
V
Batt
≈
12.5V. This causes a power reduction in the FET and in the lamps. In addition, the
brightness of the lamps is largely independent of the supply voltage range, V
Batt
= 12.5V to 16V.
3.4.1
Output Slope Control
The rise and fall time (t
r
, t
f
) of the lamp voltage can be limited to reduce radio interference. This
is done with an integrator which controls a power MOSFET as source follower. The slope time is
controlled by an external capacitor C
4
and the oscillator current (Figure
7-1 on page 9).
Calculation:
C
4
-
t
f
= t
r
= V
Batt
×
--------
I
osc
With V
Batt
= 12V, C
4
= 470 pF and I
osc
= 40 µA, the controlled slope is
470 pF
-
t
f
= t
r
= 12V
×
-----------------
×
141 µs
40 µA
3.5
Pin 5 – Attenuation
Capacitor C
4
connected to pin 5 damps oscillation tendencies.
3
4677C–AUTO–09/05
3.6
Pin 6 – Oscillator
The oscillator determines the frequency of the output voltage. This is defined by an external
capacitor, C
2
. It is charged with a constant current, I, until the upper switching threshold is
reached. A second current source is then activated which taps a double current, 2
×
I, from the
charging current. The capacitor, C
2
, is thus discharged by the current, I, until the lower switching
threshold is reached. The second source is then switched off again and the procedure starts
once more.
3.6.1
Example for Oscillator Frequency Calculation
V
T100
= V
S
× α
1
=
(
V
Batt
–
I
S
×
R
3
) × α
1
V
T<100
= V
S
× α
2
=
(
V
Batt
–
I
S
×
R
3
) × α
2
V
TL
= V
S
× α
3
=
(
V
Batt
–
I
S
×
R
3
) × α
3
where
V
T100
= High switching threshold 100% duty cycle
V
T<100
= High switching threshold < 100% duty cycle
V
TL
= Low switching threshold
α
1
,
α
2
and
α
3
are fixed values
The above mentioned threshold voltages are calculated for the following values given in the
datasheet.
V
Batt
= 12V, I
S
= 4 mA, R
3
= 150Ω
α
1
= 0.7,
α
2
= 0.67 and
α
3
= 0.28
V
T100
= (12V – 4 mA
×
150Ω)
×
0.7
≈
8V
V
T<100
= 11.4V
×
0.67 = 7.6V
V
TL
= 11.4V
×
0.28 = 3.2V
For a duty cycle of 100%, the oscillator frequency, f, is as follows:
I
osc
-
f = -----------------------------------------------------------
where C
2
= 22 nF and I
osc
= 40 µA
2
× (
V
T100
–
V
TL
) ×
C
2
Therefore:
40 µA
f = --------------------------------------------------------------- = 189Hz
2
× (
8V
–
3.2V
) ×
22 nF
For a duty cycle of less than 100%, the oscillator frequency, f, is as follows:
I
osc
f
= ----------------------------------------------------------------------------------------------------------
-
2
× (
V
T<100
–
V
TL
) ×
C
2
+
4
×
V
Batt
×
C
4
where C
4
= 470 pF
40 µA
f = ------------------------------------------------------------------------------------------------------------------------- = 185Hz
-
2
× (
7.6V
–
3.2V
) ×
22 nF + 4
×
12V
×
470 pF
A selection of different values of C
2
and C
4
provides a range of oscillator frequencies from 10Hz
to 2000Hz.
4
U6084B
4677C–AUTO–09/05
U6084B
3.7
Pins 7, 8, 10 and 15
Not connected.
3.8
Pin 9 – Status Short Circuit Latch
The status of the short-circuit latch can be monitored via pin 9 (open collector output).
Table 3-2.
Pin 9
L
H
Pin 9 Function
Function
Short-circuit detected
No short-circuit detected
3.9
3.9.1
Pins 11 and 12 – Short-circuit Protection and Current Sensing
Short-circuit Detection and Time Delay t
d
The lamp current is monitored by means of an external shunt resistor. If the lamp current
exceeds the threshold for the short-circuit detection circuit (V
T2
≈
90 mV), the duty cycle is
switched over to 100% and capacitor C
5
is charged by a current source of 20 µA (I
ch
– I
dis
). The
external FET is switched off after the cut-off threshold (V
T11
) is reached. Renewed switching on
of the FET is possible only after a power-on reset. The current source, I
dis
, ensures that capaci-
tor C
5
is not charged by parasitic currents. Capacitor C
5
is discharged by I
dis
to typically 0.7V.
Time delay, t
d
, is as follows:
(
V
11
–
0.7V
)
-
t
d
= C
5
×
-------------------------------
(
I
ch
–
I
dis
)
With C
5
= 330 nF and V
Batt
= 12V, we have
(
9.8V
–
0.7V
)
-
t
d
= 330 nF
×
---------------------------------- = 150 ms
20
µA
3.9.2
Current Limitation
The lamp current is limited by a control amplifier that protects the external power transistor. The
voltage drop across an external shunt resistor acts as the measured variable. Current limitation
takes place for a voltage drop of V
T1
≈
100 mV. Owing to the difference V
T
– V
T2
≈
10 mV, cur-
rent limitation occurs only when the short-circuit detection circuit has responded.
After a power-on reset, the output is inactive for half an oscillator cycle. During this time, the sup-
ply voltage capacitor can be charged so that current limitation is guaranteed in the event of a
short-circuit when the IC is switched on for the first time.
3.10
Pins 13 and 14 – Charge Pump and Output
Pin 14 (output) is suitable for controlling a power MOSFET. During the active integration phase,
the supply current of the operational amplifier is mainly supplied by capacitor C
3
(bootstrapping).
Additionally, a trickle charge is generated by an integrated oscillator (f
13
≈
400 kHz) and a volt-
age doubler circuit. This permits a gate voltage supply at a duty cycle of 100%.
5
4677C–AUTO–09/05
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