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SY89250V

Description
ENHANCED DIFFERENTIAL RECEIVER
File Size52KB,6 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
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SY89250V Overview

ENHANCED DIFFERENTIAL RECEIVER

Micrel, Inc.
ENHANCED DIFFERENTIAL
RECEIVER
Precision Edge
®
SY89250V
Precision Edge
®
SY89250V
FEATURES
s
3.3V and 5V power supply options
s
250ps propagation delay
s
Very high voltage gain
s
Ideal for Pulse Amplifier and Limiting Amplifier
applications
s
Data synchronous Enable/Disable (/EN) on Q
HG
and
/Q
HG
provides for complete glitchless gating of the
outputs
s
Ideal for gating timing signals
s
Complete solution for high quality, high frequency
crystal oscillator applications
s
Available in an ultra-small 8-pin (2mm
×
2mm)
MLF™ package
Precision Edge
®
DESCRIPTION
The SY89250V is a differential PECL/ECL receiver/buffer
in a space saving (2mm
×
2mm) MLF™ package. The device
is functionally equivalent to the SY100EL16VC, but features
a 70% smaller footprint. It provides a V
BB
output for either
single-ended application or as a DC bias for AC-coupling to
the device.
The SY89250V provides an /EN input which is synchro-
nized with the data input (D) signal in a way that provides
glitchless gating of the Q
HG
and /Q
HG
outputs. When the /EN
signal is LOW, the input is passed to the outputs and the data
output equals the data input. When the data input is HIGH and
the /EN goes HIGH, it will force the Q
HG
LOW and the /Q
HG
HIGH on the next negative transition of the data input. If the
data input is LOW when the /EN goes HIGH, the next data
transition to a HIGH is ignored and Q
HG
remains LOW and
/Q
HG
remains HIGH. The next positive transition of the data
input is not passed on to the data outputs under these
conditions. The Q
HG
and /Q
HG
outputs remain in their dis-
abled state as long as the /EN input is held HIGH. The /EN
input has no influence on the /Q output and the data input is
passed on (inverted) to this output whether /EN is HIGH or
LOW. This configuration is ideal for crystal oscillator applica-
tions, where the oscillator can be free running and gated on
and off synchronously without adding extra counts to the
output.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
APPLICATIONS
s
Oscillator modules
BLOCK DIAGRAM
FUNCTIONAL CROSS REFERENCE
Micrel Part Number
SY89250V
PECL/ECL
100k
Functional Cross
SY100EL16VC
/Q
1
D
2
V
BB
3
V
BB
LEN Q
LATCH
OE
8
7
6
5
V
CC
Q
HG
/Q
HG
V
EE
/EN
4
D
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame
and MLF are trademarks of Amkor Technology, Inc.
M9999-052505
hbwhelp@micrel.com or (408) 955-1690
Rev.: B
Amendment: /0
1
Issue Date: May 2005

SY89250V Related Products

SY89250V SY89250VMI SY89250VMG SY89250VMITR SY89250VMGTR
Description ENHANCED DIFFERENTIAL RECEIVER ENHANCED DIFFERENTIAL RECEIVER ENHANCED DIFFERENTIAL RECEIVER ENHANCED DIFFERENTIAL RECEIVER ENHANCED DIFFERENTIAL RECEIVER
Is it Rohs certified? - incompatible conform to incompatible conform to
Parts packaging code - DFN - DFN DFN
package instruction - HVSON, SOLCC8,.08,20 2 X 2 MM, LEAD FREE, MLF-8 HVSON, SOLCC8,.08,20 HVSON,
Contacts - 8 - 8 8
Manufacturer packaging code - MLF - MLF MLF
Reach Compliance Code - compliant compliant compliant compliant
ECCN code - EAR99 EAR99 EAR99 EAR99
Other features - ALSO OPERATES WITH A 5V SUPPLY ALSO OPERATES WITH A 5V SUPPLY ALSO OPERATES WITH A 5V SUPPLY ALSO OPERATES WITH A 5V SUPPLY
Input properties - DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL
Interface integrated circuit type - LINE RECEIVER LINE RECEIVER LINE RECEIVER LINE RECEIVER
Interface standards - GENERAL PURPOSE GENERAL PURPOSE GENERAL PURPOSE GENERAL PURPOSE
JESD-30 code - S-XDSO-N8 S-XDSO-N8 S-XDSO-N8 S-XDSO-N8
JESD-609 code - e0 e4 e0 e4
length - 2 mm 2 mm 2 mm 2 mm
Humidity sensitivity level - 2 1 1 1
Number of functions - 1 1 1 1
Number of terminals - 8 8 8 8
Maximum operating temperature - 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature - -40 °C -40 °C -40 °C -40 °C
Package body material - UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code - HVSON HVSON HVSON HVSON
Package shape - SQUARE SQUARE SQUARE SQUARE
Package form - SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) - 240 260 240 260
Certification status - Not Qualified Not Qualified Not Qualified Not Qualified
Maximum receive delay - 0.73 ns 0.73 ns 0.73 ns 0.73 ns
Number of receiver bits - 1 1 1 1
Maximum seat height - 0.9754 mm 0.9754 mm 0.9754 mm 0.9754 mm
Maximum supply voltage - 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage - 3 V 3 V 3 V 3 V
Nominal supply voltage - 3.3 V 3.3 V 3.3 V 3.3 V
surface mount - YES YES YES YES
Temperature level - INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface - Tin/Lead (Sn/Pb) NICKEL PALLADIUM GOLD Tin/Lead (Sn/Pb) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form - NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch - 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location - DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature - 30 40 30 40
width - 2 mm 2 mm 2 mm 2 mm
Base Number Matches - 1 1 1 1
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