KS57C2504
4-BIT CMOS Microcontroller
Product Specification
OVERVIEW
The S3C7254 single-chip CMOS microcontroller has been designed for high performance using Samsung's
newest 4-bit CPU core, SAM4 (Samsung Arrangeable Microcontrollers).With a two-channel comparator, up-to-
320-dot LCD direct drive capability, 8-bit timer/counter, and serial I/O, the S3C7254 offers an excellent design
solution for a wide variety of applications which require LCD functions.
Up to 27 pins of the 80-pin QFP package can be dedicated to I/O. Eight vectored interrupts provide fast response
to internal and external events. In addition, the S3C7254's advanced CMOS technology provides for low power
consumption and a wide operating voltage range.
FEATURES
Memory
•
•
512
×
4-bit RAM
4096
×
8-bit ROM
8-Bit Timer/Counter
•
•
•
27 I/O Pins
•
•
•
I/O: 15 pins
Input only: 4 pins
Output only: 8 pins
•
•
Programmable 8-bit timer
External event counter
Arbitrary clock frequency
output
External clock signal divider
Serial I/O interface clock
generator
•
•
Four external vectored
interrupts
Two quasi-interrupts
Bit Sequential Carrier
•
Supports 16-bit serial data
transfer in arbitrary format
Memory-Mapped I/O Structure
•
Data memory bank 15
Comparator
•
•
Two-channel mode: internal
reference (4-bit resolution)
One-channel mode: external
reference
Watch Timer
•
•
•
Time interval generation:
0.5 s, 3.9 ms at 32768 Hz
Four frequency outputs to
BUZ pin
Clock source generation for
LCD
Two Power-Down Modes
•
•
Idle mode (only CPU clock
stops)
Stop mode (main system
oscillation stops)
LCD Controller/Driver
•
•
•
•
40 segments and 8 common
terminals
3, 4 and 8 common
selectable
Internal resistor circuit for
LCD bias
All dot can be switched
on/off
8-Bit Serial I/O Interface
•
•
•
•
8-bit transmit/receive mode
8-bit receive only mode
LSB-first or MSB-first
transmission selectable
Internal or external clock
source
Oscillation Sources
•
•
•
Crystal, ceramic, or RC for
main system clock
Crystal oscillator for
subsystem clock
Main system clock
frequency: 4.19 MHz
(typical)
Subsystem clock frequency:
32.768 kHz
CPU clock divider circuit (by
4, 8, or 64)
•
8-Bit Basic Timer
•
4 interval timer functions
Interrupts
•
Three internal vectored
interrupts
•
4–1
PRODUCT SPECIFICATION
S3C7254
Instruction Execution Times
•
•
0.95, 1.91, 15.3 µs at 4.19
MHz
122 µs at 32.768 kHz
Operating Temperature
•
– 40
°
C to 85
°
C
Package Type
•
80-pin QFP
Operating Voltage Range
•
2.7 V to 6.0 V
XIN
RESET
BASIC
TIMER
WATCH
TIMER
SIO
P0.0 /
SCK
/ K0
P0.1 / SO / K1
P0.2 / SI / K2
P0.3 / BUZ / K3
INTERNAL
INTERRUPTS
I/O PORT 0
INTERRUPT
CONTROL
BLOCK
XTIN
XOUT
XTOUT
LCD
DRIVER/
CONTROLLER
VLC1–VLC5
COM0–COM7
SEG0–SEG31
P5.0/SEG32–
P5.7/SEG39
P2.0–P2.3
P3.0
P3.1
P3.2 / LCDSY
P3.3 / LCDCK
P4.0/CLO
P4.1/TCL0
P4.2/TCLO0
CLOCK
STACK
POINTER
I/O PORT 2
PROGRAM
COUNTER
I/O PORT 3
INSTRUCTION DECODER
PROGRAM
STATUS WORD
I/O PORT 4
COMPARA-
TOR
P1.0 / INT0 / CIN0
P1.1 / INT1 / CIN1
P1.2 / INT2
P1.3 / INT4
ARITHMETIC
LOGIC UNIT
FLAGS
INPUT
PORT 1
512 x 4-BIT
DATA
MEMORY
4-KB
PROGRAM
MEMORY
8-BIT
TIMER/
COUNTER
Figure 1. S3C7254 Simplified Block Diagram
4–2
S3C7254
PRODUCT SPECIFICATION
SEG30
SEG31
P5.0 / SEG32
P5.1 / SEG33
P5.2 / SEG34
P5.3 / SEG35
P5.4 / SEG36
P5.5 / SEG37
P5.6 / SEG38
P5.7 / SEG39
VSS
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
V
LC1
V
LC2
V
LC3
V
LC4
V
LC5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SEG29
SEG28
SEG27
SEG26
SEG25
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG15
SEG14
S3C7254
KS57C2504
(TOP VIEW)
(TOP VIEW)
SEG13
SEG12
SEG11
SEG10
SEG9
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
XT
OUT
XT
IN
X
IN
X
OUT
V
DD
TEST
RESET
P4.2 / TCLO0
P4.1 / TCL0
P4.0 / CL
O
Figure 2. S3C7254 80–Pin QFP Assignment Diagram
P0.0 /
SCK
/ K0
P0.1 / SO / K1
P0.2 / SI / K2
P0.3 / BUZ / K3
P1.0 / INT0 / CIN0
P1.1 / INT1 / CIN1
P1.2 / INT2
P1.3 / INT4
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
LCDSY / P3.2
LCDCK / P3.3
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
4–3
PRODUCT SPECIFICATION
S3C7254
Table 1. S3C7254 Pin Descriptions
Pin Name
P0.0
P0.1
P0.2
P0.3
Pin Type
I/O
Description
4-bit I/O port.
1-bit or 4-bit read/write and test is possible.
Individual pins are software configurable as input or
output.
Individual pins are software configurable as open-
drain or push-pull output.
4-bit pull-up resistors are software assignable; pull-up
resistors are automatically disabled for output pins.
4-bit input port.
1-bit or 4-bit read and test are possible.
The 1-bit unit pull-up resistors are assigned to input
pins by software.
An interrupt is generated by digital input at P1.0,
P1.1.
Same as port 0 except that 8-bit read/write and test is
possible.
Number
25
26
27
28
Share Pin
K0/SCK
K1/SO
K2/SI
K3/BUZ
P1.0
P1.1
P1.2
P1.3
I
29
30
31
32
INT0/CIN0
INT1/CIN1
INT2
INT4
P2.0–P2.3
P3.0
P3.1
P3.2
P3.3
P4.0
P4.1
P4.2
P5.0–P5.7
SCK
SO
SI
BUZ
K0–K3
INT0
INT1
INT2
INT4
I/O
33–36
37
38
39
40
–
–
–
LCDSY
LCDCK
CLO
TCL0
TCLO0
SEG32–
SEG39
P0.0/K0
P0.1/K1
P0.2/K2
P0.3/K3
P0.0–P0.3
P1.0/CIN0
P1.1/CIN1
P1.2
P1.3
I/O
Same as port 0 except that port 4 is 3-bit I/O port.
41
42
43
3–10
25
26
27
28
25–28
29
30
31
32
O
I/O
I/O
I/O
I/O
I/O
I
I
I
Output port for 1-bit data
Serial I/O interface clock signal
Serial data output
Serial data input
2 KHz, 4 KHz, 8 KHz or 16 KHz frequency output for
buzzer sound
External interrupt. The triggering edge is selectable.
External interrupts. The triggering edge for INT0 and
INT1 is selectable.
Quasi-interrupt with detection of rising or falling
edges
External interrupts with detection of rising and falling
edges
4–4
S3C7254
PRODUCT SPECIFICATION
Table 1. S3C7254 Pin Descriptions (Continued)
Pin Name
CIN0
CIN1
LCDSY
LCDCK
CLO
TCL0
TCLO0
SEG32–SEG39
SEG0–SEG29
SEG30–SEG31
COM0–COM7
V
LC1
–V
LC5
X
IN,
X
OUT
XT
IN,
XT
OUT
V
DD
V
SS
RESET
TEST
Pin Type
I
Description
2-channel comparator input.
CIN0: comparator input or external reference input
CIN1: comparator input only.
LCD synchronization clock output for display expan-
sion
LCD clock output for display expansion
Clock output
External clock input for timer/counter 0
Timer/counter 0 clock output
LCD segment signal output
LCD segment signal output
LCD common signal output
LCD power supply. Voltage dividing resistors are
assignable by mask option.
Crystal, ceramic or RC oscillator pins for system
clock.
Crystal oscillator pins for subsystem clock.
Main power supply
Ground
Chip reset signal input
Chip test signal input (must be connected to V
SS
)
Number
29
30
39
40
41
42
43
3–10
51–80
1–2
12–19
20–24
48, 47
49, 50
46
11
44
45
Share Pin
P1.0/INT0
P1.1/INT1
P3.2
P3.3
P4.0
P4.1
P4.2
P5.0–P5.7
–
–
–
–
–
–
–
–
–
I/O
I/O
I/O
I/O
I/O
O
O
O
–
–
–
–
–
I
I
NOTE:
Pull-up resistors for all I/O ports are automatically disabled if they are configured to output mode.
4–5
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