Data Sheet
BCM53128
Multiport Gigabit Ethernet Switches
GE NERA L DESCR IPTI O N
The Broadcom
®
BCM53128 is a highly integrated,
cost-effective unmanaged-smart gigabit switch. The
switch design is based on the field-proven, industry-
leading ROBO architecture. This device combines
all the functions of a high-speed switch system
including packet buffers, PHY transceivers, media
access controllers (MACs), address management,
port-based rate control, and a non-blocking switch
fabric into a single 65-nm CMOS device. Designed
to be fully compliant with the IEEE 802.3™ and
IEEE 802.3x specifications, including the MAC-
control PAUSE frame, the BCM53128 provides
compatibility with all industry-standard Ethernet,
Fast Ethernet, and Gigabit Ethernet (GbE) devices.
The BCM53128 has a rich feature set suitable for
not only standard GbE connectivity for desktop and
laptop PCs, but also for next-generation gaming
consoles, set-top boxes, networked DVD players,
and home theater receivers. It is also specifically
designed for next generation SOHO/SMB routers
and gateways.
The BCM53128 contains eight full-duplex 10/100/
1000BASE-TX Ethernet transceivers.
The BCM53128 provides 70+ on-chip MIB counters
to collect receive and transmit statistics for each
port.
The BCM53128 is available in commercial
temperature (C-Temp) and industrial temperature (I-
Temp) rated packages. The BCM53128 is provided
in a 256-pin eLQFP (28 mm x 28 mm) package.
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Port-based VLAN
IEEE 802.1Q-based VLAN with 4K entries
MAC-based trunking with automatic link failover
Port-based rate control
Port mirroring
BroadSync
®
HD for IEEE 802.1AS support
– Timestamp tagging at MAC interface
– Time-aware egress scheduler
DOS attack prevention
– Support IPv6
IGMP snooping, MLD snooping support
Green mode support
Spanning tree support (multiple spanning trees–
up to eight)
Loop detection for unmanaged configurations
with Broadcom’s patented LoopDTech™
technology
CableChecker™ with unmanaged mode support
Double tagging/QinQ
IEEE 802.az EEE (Energy Efficient Ethernet)
support
IEEE 802.3as support
IEEE 802.3x programmable per-port flow control
and backpressure, with IEEE 802.1x support for
secure user authentication
EEPROM, MDC/MDIO, and SPI Interfaces
Serial Flash Interface for accessing embedded
8051 processor
4K entry MAC address table with automatic
learning and aging
192 KB packet buffer
256 multicast group support
Jumbo frame support up to 9720 bytes
Serial and parallel LED interface
1.2V for core and 3.3V for I/O
JTAG support
256 eLQFP
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FE ATUR ES
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Nine 10/100/1000 media access controllers
Eight port 10/100/1000BASE-T/Tx transceivers
One GMII/RGMII/MII/RvMII/TMII/RvTMII
interface for an in-band management port (IMP)
for connection to a CPU/management entity
without PHY
IEEE 802.1p, MAC, Port, TOS, and DiffServ QoS
for four queues, plus two time sensitive queues
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53128-DS07-R
Corporate Headquarters: San Jose, CA
April 6, 2016
Figure 1: Functional Block Diagram
Broadcom
®
, the pulse logo, Connecting everything
®
, the Connecting everything logo, and Avago
Technologies are among the trademarks of Broadcom and/or its affiliates in the United States, certain other
countries and/or the EU. Any other trademarks or trade names mentioned are the property of their respective
owners.
Broadcom reserves the right to make changes without further notice to any products or data herein to improve
reliability, function, or design.
Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not
assume any liability arising out of the application or use of this information, nor the application or use of any
product or circuit described herein, neither does it convey any license under its patent rights nor the rights of
others.
This data sheet (including, without limitation, the Broadcom component(s) identified herein) is not designed,
intended, or certified for use in any military, nuclear, medical, mass transportation, aviation, navigations,
pollution control, hazardous substances management, or other high-risk application. BROADCOM
PROVIDES THIS DATA SHEET “AS-IS,” WITHOUT WARRANTY OF ANY KIND. BROADCOM DISCLAIMS
ALL WARRANTIES, EXPRESSED AND IMPLIED, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-
INFRINGEMENT.
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© 2016 by Broadcom. All rights reserved.
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BCM53128 Data Sheet
Revision History
Revision History
Change Description
Revision: 53128-DS07-R
Date: 04/06/16
Updated:
•
“Transmit Output Port Queues” on
Corrected typo for entries
page 90
number.
•
Table 291: “EEE GLB Congst TH
Corrected typo for entries
Register (Page 92h: Address C4h),” on
number.
page 293
•
Table 293: “EEE TXQ Cong TH Register
Corrected typo for entries
(Page 92h: Address C6h),” on page 293
number.
Added:
•
Table 324: “BCM53128IQLE Package
–
with Heat Sink, 4-layer Board, P=3.1W,”
on page 315
Revision: 53128-DS06-R
Date: 06/02/14
Updated:
• Table 324: “Ordering Information,” on
page 318
Revision: 53128-DS05-R
Date: 02/18/13
Customer Impact
Action Items
No action required.
No action required.
No action required.
Added ordering information for
part number
BCM53128IQLE(G)
Updated:
• Default bits 13, 12, 8, and 6 in Table 128
on page 197.
• Default bits 11, 10, 8, 7, 6, and 5 in
Table 132 on page 200.
• Default bits 12, 11, 10, 9, and 8 in
Table 137 on page 205.
• Table 321: “Ordering Information,” on
page 319.
Revision: 53128-DS04-R
Date: 07/21/11
Updated:
• General Description
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Updated the general
description.
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April 6, 2016 • 53128-DS07-R
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No action required.
No action required.
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BROADCOM CONFIDENTIAL
BCM53128 Data Sheet
Revision History
Change Description
•
Section 12: “Ordering Information,” on
page 319
Customer Impact
Added ordering information for
part number
BCM53128VIQLE(G)
Action Items
No action required.
Revision: 53128-DS03-R
Date: 12/13/10
Updated:
• “IGMP Snooping” on page 49
• “Loop Detection” on page 52
• “Address Resolution and Frame
Forwarding” on page 59
• “Multicast Addresses” on page 61
•
Table 8: “Multicast Forward Field
Definitions,” on page 61
None.
Updated referenced document.
Edited the forward field.
Removed reference to
IP_MULTICAST bit.
Replaced IP_MULTICAST
column with UNICAST/
MULTICAST column and
updated the forwarding field.
Replaced IPMCO with
FWD_PRT_MAP.
Updated referenced document.
Updated SRAM value.
Changed Read MII Register 27
to Write Register 27.
No action required.
No action required.
Corrected typo.
No action required.
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Table 9: “Address Table Entry for
Multicast Address,” on page 61
“Energy Efficient Ethernet Mode” on
page 66
“Serial Flash Interface” on page 95
Figure 44: “Write Access to the Register
Set Using the PseudoPHY (PHYAD =
11110) MDC/MDIO Path,” on page 119
Table 29: “Signal Type Definitions,” on
page 126
Updated XTALO signal
description and added GPIO
pins.
Section 6: “Pin Assignment,” on page Updated pin assignments to
139
include GPIO pins.
“BCM53128KQLE Pin List by Ball
Updated pin list to include GPIO
Name” on page 141
pins
Table 31: “Control Registers (Page
Added addresses B0h-B7h and
00h),” on page 145
B8h-BFh to table.
“PHY Identifier Register (Page 10h–17h: Edited binary OUI.
Address 04h)” on page 199
Table 170: “Expansion Register 45h:
Added addresses B8h-BBh and
Transmit CRC,” on page 233
BCh-BFh
Table 295: “Absolute Maximum
Updated maximum value for
Ratings,” on page 299
electrostatic discharge (V
ESD
)
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Table 297: “Electrical Characteristics,”
on page 300
• Figure 64: “SPI Timings, SS Asserted
During SCK High,” on page 313
• Table 316: “SPI Timings,” on page 313
Added:
Updated XTALI minimum and
maximum.
Updated figure.
Added time interval rows
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April 6, 2016 • 53128-DS07-R
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No action required.
No action required.
No action required.
Corrected typo.
No action required.
New feature option available.
New feature option available.
No action required.
Corrected typo.
No action required.
Corrected typo.
No action required.
No action required.
No action required.
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BROADCOM CONFIDENTIAL
BCM53128 Data Sheet
Revision History
Change Description
“GPIO ” on page 95
Revision: 53128-DS02-R
Date: 09/08/10
Updated:
• “Deep Green Mode” on page 66.
• Figure 45: “LED Interface Register
Structure Diagram,” on page 121.
• Table 29: “Signal Type Definitions,” on
page 125.
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Customer Impact
Action Items
New feature option available.
None.
Correct editing errors.
No action required.
No action required.
Suggest a review of the
schematics.
Typo correction.
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Power interface description
update to change core power
from 1.1V to 1.2V.
Table 82: “Aging Time Control Register Descriptions updated.
(Page 02h: Address 06h–09h),” on
page 169.
“Absolute Maximum Ratings” on
Updated core value absolute
page 297.
maximum rating value.
“Recommended Operating Conditions” Updated core voltage 1.2V
on page 297.
minimum and maximum value
of recommended operating
conditions.
“Electrical Characteristics” on page 298. Updated maximum power
consumption by core 1.2V and
IO 3.3V.
Section 11: “Mechanical Information,” on Correct editing errors.
page 316.
Document Number
53128-DS01-R
Date
04/02/10
53128-DS00-R
Broadcom
®
April 6, 2016 • 53128-DS07-R
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Change Description
Updated:
• Table 3: “Bucket Bit Rate,” on page 44.
• Section 6: “Pin Assignment,” on page 137.
• Section 7: “Register Definitions,” on page 141.
• Section 8: “Electrical Characteristics,” on page 296.
• Section 9: “Timing Characteristics,” on page 298.
• Section 10: “Thermal Characteristics,” on page 313.
Added:
• “TMII (Turbo MII) and RvTMII (Reverse TMII) Interface” on
page 91.
• “Signal Descriptions” on page 124.
• “LED Control Register (Page 00h: Address 1Ch)” on page 152.
• “IMP RGMII Control Register (Page 00h: Address 60h)” on
page 160.
• “Page 03h: Interrupt Control Register” on page 175.
• “Page 92h: EEE Control Register” on page 287.
Initial release.
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Suggest a review of the
schematics.
Suggest a review of the
schematics.
Suggest a review of the
schematics.
No action required.
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BROADCOM CONFIDENTIAL
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