DATA SHEET
PNP SILICON EPITAXIAL TRANSISTOR
2SB1572
PNP SILICON EPITAXIAL TRANSISTOR
FEATURES
•
Low V
CE(sat)
: V
CE(sat)1
≤ −0.4
V
•
Complementary to 2SD2403
PACKAGE DRAWING (Unit: mm)
4.5±0.1
1.6±0.2
1.5±0.1
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Collector to Base Voltage
V
CBO
−80
Collector to Emitter Voltage
V
CEO
−60
Emitter to Base Voltage
V
EBO
−6.0
Collector Current (DC)
I
C(DC)
−3.0
Note1
Collector Current (pulse)
I
C(pulse)
−5.0
Base Current (DC)
I
B(DC)
−0.2
Note1
Base Current (pulse)
I
B(pulse)
−0.4
Note2
Total Power Dissipation
P
T
2.0
Junction Temperature
T
j
150
Storage Temperature Range
T
stg
–55 to + 150
Notes 1.
PW
≤
10 ms, Duty Cycle
≤
50%
2
2.
When mounted on ceramic substrate of 16 cm x 0.7 mm
V
V
V
A
A
A
A
W
°C
°C
0.8 MIN.
E
0.42
±0.06
1.5
C
B
0.47
±0.06
3.0
0.42
±0.06
0.41
+0.03
–0.05
E: Emitter
C: Collector (Fin)
B: Base
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Collector Cut-off Current
Emitter Cut-off Current
DC Current Gain
Note
SYMBOL
I
CBO
I
EBO
h
FE1
h
FE2
TEST CONDITIONS
V
CB
=
−80
V, I
E
= 0
V
EB
=
−6.0
V, I
C
= 0
V
CE
=
−2.0
V, I
C
=
−0.1
A
V
CE
=
−2.0
V, I
C
=
−1.0
A
V
CE
=
−2.0
V, I
C
=
−0.1
A
I
C
=
−2.0
A, I
B
=
−0.1
A
I
C
=
−3.0
A, I
B
=
−0.15
A
I
C
=
−2.0
A, I
B
=
−0.1
A
V
CE
=
−10
V, I
E
= 0.3 A
V
CB
=
−10
V, I
E
= 0, f = 1.0 MHz
I
C
=
−1.0
A, V
CC
=
−10
V,
R
L
= 5.0
Ω,
I
B1
=
−I
B2
=
−0.1
A,
MIN.
TYP.
MAX.
−100
−100
UNIT
nA
nA
−
80
100
−0.63
200
−0.685
−0.2
−0.3
−0.89
160
45
155
510
35
400
−0.73
−0.4
−0.6
−1.2
−
V
V
V
V
MHz
pF
ns
ns
ns
Base to Emitter Voltage
Note
Note
Note
V
BE
V
CE(sat)1
V
CE(sat)2
V
BE(sat)
f
T
C
ob
t
on
t
stg
t
f
Collector Saturation Voltage
Collector Saturation Voltage
Base Saturation Voltage
Gain Bandwidth Product
Output Capacitance
Turn-on Time
Storage Time
Fall Time
Note
Note
Pulsed: PW
≤
350
µ
s, Duty Cycle
≤
2%
h
FE
CLASSFICATION
Marking
h
FE2
HX
100 to 200
HY
160 to 320
HZ
200 to 400
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D11204EJ3V0DS00 (3rd edition)
Date Published July 2001 NS CP(K)
Printed in Japan
4.0±0.25
2.5±0.1
©
2001
2SB1572
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
100
FORWARD BIAS SAFE OPERATING AREA
−10
−5
−2
−1
10
0
dT - Percentage of Rated Power - %
I
C
- Collector Current - A
80
PW
60
=
1
m
s
10
m
s
40
−0.5
−0.2
−0.1
−1
m
s
DC
20
T
A
= 25˚C
Single Pulse
−2
−5
−10
−20
−50
−100
V
CE
- Collector to Emitter Voltage - V
0
30
60
90
120
150
T
A
- Ambient Temperature - ˚C
−2.0
I
C
- Collector Current - A
COLLECTOR CURRENT vs.
COLLECTOR TO EMITTER VOLTAGE
m
A
−
4
A
0m
0
−
3
mA
−1.2
−0.8
−0.4
I
B
=
−
10
mA
I
C
- Collector Current - A
−1.6
−
5
−
20
0
mA
−10
−5
−2
−1
−0.5
COLLECTOR CURRENT vs.
BASE TO EMITTER VOLTAGE
V
CE
=
−2
V
=1
25˚
C
75˚
C
T
A
−0.2
−0.1
−0.05
−0.02
−0.01
−0.005
−0.002
−0.001
−300
0
−0.2
−0.4
−0.6
−0.8
−1.0
−500
−700
–25˚C
25˚C
0˚C
−900
−1100
V
CE
- Collector to Emitter Voltage - V
V
BE
- Base to Emitter Voltage - mV
DC CURRENT GAIN vs. COLLECTOR CURRENT
V
CE(sat)
- Collector Saturation Voltage - mV
COLLECTOR SATURATION VOLTAGE vs.
COLLECTOR CURRENT
−1000
−500
−200
−100
I
C
= 20
.
I
B
1000
V
CE
=
−2
V
h
FE
- DC Current Gain
100
T
A
= 125
˚C
75
˚C
25
˚C
0
˚C
−25
˚C
T
A
= 125˚C
75˚C
25˚C
−50
−20
−10
−5
−2
−1
−0.01 −0.02 −0.05 −0.1 −0.2
−0.5
−1
−2
−5
−10
0˚C
−25
˚C
10
−0.01 −0.02 −0.05 −0.1 −0.2
−0.5
−1
−2
−5
−10
I
C
- Collector Current - A
I
C
- Collector Current - A
2
Data Sheet D11204EJ3V0DS
2SB1572
COLLECTOR SATURATION VOLTAGE vs.
COLLECTOR CURRENT
V
CE(sat)
- Collector Saturation Voltage - mV
BASE SATURATION VOLTAGE vs.
COLLECTOR CURRENT
−10
V
BE(sat)
- Base Saturation Voltage - V
I
C
= 20
.
I
B
−1000
−500
I
C
= 50
.
I
B
−5
−200
T
A
= 125
˚C
75
˚C
−100
25
˚C
−50
−20
−10
−5
−2
−1
−0.01 −0.02 −0.05 −0.1 −0.2
−0.5
−1
−2
−5
−10
0
˚C
−25
˚C
−1
−0.5
−0.2
−0.1
−0.01 −0.02 −0.05 −0.1 −0.2
−0.5
−1
−2
−5
−10
I
C
- Collector Current - A
I
C
- Collector Current - A
GAIN BANDWIDTH PRODUCT vs.
EMITTER CURRENT
1000
f
T
- Gain Bandwidth Product - MHz
OUTPUT CAPACITANCE vs.
REVERSE VOLTAGE
1000
C
ob
- Outpur Capacitance - pF
V
CE
=
−10
V
f = 1.0 MHz
500
500
200
100
50
200
100
50
20
10
0.01 0.02
0.05 0.1
0.2
0.5
1
2
5
10
20
10
−0.1 −0.2
−0.5
−1
−2
−5
−10 −20
−50 −100
I
E
- Emitter Current - A
V
CB
- Collector to Base Voltage - V
SWITCHING CHARACTERISTICS
10
5
t
on
- Turn-On Time -
µs
t
stg
- Storage Time -
µs
t
f
- Fall Time -
µs
V
CC
=
−10
V
I
C
= 20
.
I
B
I
B1
=
−I
B2
t
stg
t
on
2
1
0.5
0.2
0.1
0.05
0.02
0.01
t
f
−0.5
−1
−2
−5
−10
−0.01 −0.02 −0.05 −0.1 −0.2
I
C
- Collector Current - A
Data Sheet D11204EJ3V0DS
3
2SB1572
•
The information in this document is current as of July, 2001. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
•
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
•
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third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
patents, copyrights or other intellectual property rights of NEC or others.
•
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of customer's equipment shall be done under the full
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
•
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
risks of damage to property or injury (including death) to persons arising from defects in NEC
semiconductor products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment, and anti-failure features.
•
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