CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including load conditions, must be designed to maintain the maximum junction temperature below 175°C for the metal
can package, and below 150°C for the plastic packages (See Figure 5.).
2.
JA
is measured with the component mounted on an evaluation PC board in free air.
3. The maximum operating temperature may have to be derated depending on the output load condition. See Figure 5 for more information.
Electrical Specifications
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage
V
SUPPLY
=
12V,
R
S
= 50, R
L
= 100 C
L
= 10pF, Unless Otherwise Specified
TEST
CONDITIONS
TEMP.
(°C)
HA-5033-2
MIN
TYP
MAX
MIN
HA-5033-5
TYP
MAX
UNITS
25
Full
-
-
-
-
-
-
-
-
5
6
33
20
30
3
1.6
20
15
25
-
35
50
-
-
-
-
-
-
-
-
-
-
-
5
6
33
20
30
3
1.6
20
15
25
-
35
50
-
-
-
mV
mV
V/°C
A
A
M
pF
V
P-P
Average Offset Voltage Drift
Bias Current
Full
25
Full
Input Resistance
Input Capacitance
Input Noise Voltage
TRANSFER CHARACTERISTICS
Voltage Gain
R
L
= 100
R
L
= 1k
R
L
= 100
-3dB Bandwidth
OUTPUT CHARACTERISTICS
Output Voltage Swing
R
L
= 100
R
L
= 1k, V
S
=
15V
Output Current
Output Resistance
Full Power Bandwidth
Full Power Bandwidth (Note 4)
TRANSIENT RESPONSE
Rise Time
Propagation Delay
V
OUT
= 500mV
V
OUT
= 1V
RMS
, R
L
= 1k
10Hz to 100MHz
25
25
25
25
25
Full
25
0.93
0.93
0.92
-
-
0.99
-
250
-
-
-
-
0.93
0.93
0.92
-
-
0.99
-
250
-
-
-
-
V/V
V/V
V/V
MHz
Full
Full
25
25
25
25
8
11
80
-
-
15.9
10
12
100
8
146
17.5
-
-
-
-
-
-
8
11
80
-
-
15.9
10
12
100
8
146
17.5
-
-
-
-
-
-
V
V
mA
MHz
MHz
25
25
-
-
4.6
1
-
-
-
-
4.6
1
-
-
ns
ns
FN2924 Rev 8.00
February 6, 2006
Page 2 of 12
HA-5033
Electrical Specifications
PARAMETER
Overshoot
Slew Rate (Note 4)
Settling Time to 0.1%
Differential Phase Error (Note 5)
Differential Gain Error (Note 5)
POWER SUPPLY CHARACTERISTICS
Supply Current
25
Full
Power Supply Rejection Ratio
Harmonic Distortion
NOTES:
4. V
SUPPLY
=
15V,
V
OUT
=
10V,
R
L
= 1k.
5. Differential gain and phase error are nonlinear signal distortions found in video systems and are defined as follows: Differential gain error is
defined as the change in amplitude at the color subcarrier frequency as the picture signal is varied from blanking to white level. Differential phase
error is defined as the change in the phase of the color subcarrier as the picture signal is varied from blanking to white level. R
L
= 300.
V
IN
= 1V
RMS
at 100kHz
Full
25
-
-
54
-
21
21
-
<0.1
25
30
-
-
-
-
54
-
21
21
-
<0.1
25
30
-
-
mA
mA
dB
%
V
SUPPLY
=
12V,
R
S
= 50, R
L
= 100 C
L
= 10pF, Unless Otherwise Specified
(Continued)
TEST
CONDITIONS
TEMP.
(°C)
25
25
25
25
25
HA-5033-2
MIN
-
1
-
-
-
TYP
3
1.1
50
0.02
0.03
MAX
-
-
-
-
-
MIN
-
1
-
-
-
HA-5033-5
TYP
3
1.1
50
0.02
0.03
MAX
-
-
-
-
-
UNITS
%
V/ns
ns
Degree
%
Test Circuits and Waveforms
+15V
0.1F
+12V
0.1F
IN
R
L
0.1F
-15V
OUT
IN
100
0.1F
-12V
OUT
FIGURE 1. SLEW RATE AND SETTLING TIME
FIGURE 2. TRANSIENT RESPONSE
10V
INPUT
0V
90%
10%
500mV
INPUT
0V
OVERSHOOT
V
SLEW
t
RATE =
V/t
SETTLING TIME
OUTPUT
ERROR BAND
10mV
FROM
FINAL VALUE
90%
OUTPUT
10%
NOTE: Measured on both
positive and negative transitions.
FIGURE 3. SETTLING TIME AND SLEW RATE
FIGURE 4. RISE TIME AND OVERSHOOT
FN2924 Rev 8.00
February 6, 2006
Page 3 of 12
HA-5033
Test Circuits and Waveforms
(Continued)
V
IN
V
IN
0V
0V
V
OUT
0V
V
OUT
0V
T
A
= 25°C, R
S
= 50R
L
= 100
+10V RESPONSE
T
A
= 25°C, R
S
= 50R
L
= 1k
+10V RESPONSE
500mV
V
IN
0V
500mV
V
OUT
0V
T
A
= 25°C, R
S
= 50, R
L
= 100
PULSE RESPONSE
Schematic Diagram
V+
R
5
Q
15
R
4
Q
11
Q
6
Q
10
Q
16
Q
12
R
9
Q
19
R
6
Q
17
Q
13
Q
5
Q
18
R
3
V-
Q
14
R
1
Q
9
R
13
V
IN
Q
3
R
8
Q
4
Q
7
R
11
V
OUT
Q
8
R
10
Q
2
Q
1
R
2
R
12
FN2924 Rev 8.00
February 6, 2006
Page 4 of 12
HA-5033
Application Information
Layout Considerations
The wide bandwidth of the HA-5033 necessitates that high
frequency circuit layout procedures be followed. Failure to
follow these guidelines can result in marginal performance.
Probably the most crucial of the RF/video layout rules is the
use of a ground plane. A ground plane provides isolation and
minimizes distributed circuit capacitance and inductance
which will degrade high frequency performance. IC sockets
contribute inter-lead capacitance which limits device
bandwidth and should be avoided.
Pin 6 can be tied to either supply, grounded, or simply not used.
But to optimize device performance and improve isolation, it is
recommended that this pin be grounded.
Other considerations are proper power supply bypassing
and keeping the input and output connections as short as
possible which minimizes distributed capacitance and
reduces board space.
It is also recommended that the bypass capacitors be
connected close to the HA-5033 (preferably directly to the
supply pins).
Figure 5 is based on:
T
JMAX
–
T
A
-
P
DMAX
= ------------------------------
JA
Where: T
JMAX
= Maximum Junction Temperature of the Device
T
A
= Ambient Temperature
JA
= Junction to Ambient Thermal Resistance
MAXIMUM TOTAL POWER DISSIPATION (W)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
25
QUIESCENT P
D
= 0.72W
AT V
S
=
12V,
I
CC
= 30mA
45
65
85
105
125
PDIP
CAN
Power Supply Decoupling
For optimum device performance, it is recommended that
the positive and negative power supplies be bypassed with
capacitors to ground. Ceramic capacitors ranging in value
from 0.01F to 0.1F will minimize high frequency variations
in supply voltage. Solid tantalum capacitors 1F or larger will
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