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DDTC123JLP

Description
PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR
File Size200KB,7 Pages
ManufacturerDiodes
Websitehttp://www.diodes.com/
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DDTC123JLP Overview

PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR

DDTCxxxxLP (R1≠R2 Series)
PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR
Features
Epitaxial Planar Die Construction
Ultra-Small Leadless Surface Mount Package
Ideally Suited for Automated Assembly Processes
Lead Free By Design/RoHS Compliant (Note 1)
"Green" Device (Note 2)
2
3
1
3
2
E
B
C
R
1
R
2
1
Mechanical Data
Case: DFN1006-3
Case Material: Molded Plastic, "Green" Molding
Compound. UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020C
Terminal Connections: Collector Dot (See Diagram)
Terminals: Finish
NiPdAu annealed over Copper
leadframe. Solderable per MIL-STD-202, Method 208
Marking Information: See Page 6
Ordering Information: See Page 6
Weight: 0.001 grams (approximate)
Component P/N
DDTC123JLP
DDTC143ZLP
DDTC114YLP
R1(NOM)
2.2K
4.7K
10K
R2(NOM)
47K
47K
47K
C
3
Fig. 1
OUT
IN
1
B
IN
E
B
1
2
E
C
3
OUT
R
1
R
2
GND
2
GND
Equivalent Inverter Circuit
Schematic and Pin Configuration
Fig. 2
Figure
2
2
2
Maximum Ratings
Characteristic
Supply Voltage
Input Voltage
@T
A
= 25°C unless otherwise specified
P/N
DDTC123JLP
DDTC143ZLP
DDTC114YLP
DDTC123JLP
DDTC143ZLP
DDTC114YLP
Symbol
V
CC
V
IN
Value
50
-5 to +12
-5 to +30
-5 to +40
100
100
70
250
2
100
Unit
V
V
Output Voltage
Power Dissipation (Note 3)
Power Deration above 25
°C
Maximum Collector Current
I
O
P
D
P
der
I
C(max)
mA
mW
mW/°C
mA
Thermal Characteristics
Characteristic
Junction Operating and Storage Temperature Range
Thermal Resistance, Junction to Ambient Air (Note 3)
(Equivalent to one heated junction of NPN)
Notes:
1.
2.
3.
Symbol
T
j
, T
STG
R
θJA
Value
-55 to +150
400
Unit
°C
°C/W
No purposefully added lead.
Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.
Device mounted on FR-4 PCB, 1 inchx0.85inchx0.062inch; pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which
can be found on page 6 or our website at http://www.diodes.com/datasheets/ap02001.pdf.
DS30755 Rev. 4 - 2
1 of 7
www.diodes.com
DDTCxxxxLP (R1≠R2 Series)
© Diodes Incorporated

DDTC123JLP Related Products

DDTC123JLP DDTC114YLP DDTC123JLP-7-F DDTC143ZLP DDTC143ZLP-7-F DDTC114YLP-7-F
Description PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR PRE-BIASED SMALL SIGNAL SURFACE MOUNT 100mA NPN TRANSISTOR
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