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74LVQ245

Description
Low Voltage Octal Bidirectional Transceiver
File Size65KB,6 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet View All

74LVQ245 Overview

Low Voltage Octal Bidirectional Transceiver

74LVQ245 Low Voltage Octal Bidirectional Transceiver with 3-STATE Outputs
February 1992
Revised June 2001
74LVQ245
Low Voltage Octal Bidirectional Transceiver
with 3-STATE Outputs
General Description
The LVQ245 contains eight non-inverting bidirectional buff-
ers with 3-STATE outputs and is intended for bus-oriented
applications. Current sinking capability is 12 mA at both the
A and B ports. The Transmit/Receive (T/R) input deter-
mines the direction of data flow through the bidirectional
transceiver. Transmit (active-HIGH) enables data from A
ports to B ports; Receive (active-LOW) enables data from
B ports to A ports. The Output Enable input, when HIGH,
disables both A and B ports by placing them in a HIGH Z
condition.
Features
s
Ideal for low power/low noise 3.3V applications
s
Implements patented EMI reduction circuitry
s
Available in SOIC JEDEC, SOIC EIAJ and QSOP
packages
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Improved latch-up immunity
s
Guaranteed incident wave switching into 75
s
4 kV minimum ESD immunity
Ordering Code
Order Number
74LVQ245SC
74LVQ245SJ
74LVQ245QSC
Package Number
M20B
M20D
MQA20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
Output Enable Inputs
Transmit/Receive Input
Side A Inputs or
3-STATE Outputs
B
0
–B
7
Side B Inputs or
3-STATE Outputs
Truth Table
Inputs
Outputs
OE
L
L
H
H
=
HIGH Voltage Level
OE
T/R
T/R
L
H
X
Bus B Data to Bus A
Bus A Data to Bus B
HIGH-Z State
X
=
Immaterial
A
0
–A
7
L
=
LOW Voltage Level
© 2001 Fairchild Semiconductor Corporation
DS011357
www.fairchildsemi.com

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