HIP1011A
PCI Hot Plug Controller
SIG NS
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NDED FO LACEMENT
COMME
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NO T RE
MENDED pport Center at
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NO REC
m/tsc
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our Tech r www.intersil.co
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T
1-888-IN
DATASHEET
FN4631
Rev 5.00
November 16, 2004
The HIP1011A is the second PCI Hot Plug Voltage bus
control IC from Intersil. A drop-in alternative to the widely
used HIP1011, the HIP1011A has the same form, fit and
function but additionally features an adjustable latch-off time
of the MOSFET switches and fault reporting.
Like the HIP1011, the HIP1011A creates a small and simple
yet complete power control solution with discrete power
MOSFETs and a few passive components. Four
independent supplies are controlled, +5V, +3.3, +12V, and
-12V. The +12V and -12V switches are integrated. For the
+5V and +3.3V supplies, overcurrent (OC) protection is
provided by sensing the voltage across external current-
sense resistors. For the +12V and -12V supplies OC
protection is provided internally. In addition, an on-chip
reference is used to monitor the +5V, +3.3V and +12V
outputs for undervoltage (UV) conditions. The PWRON input
controls the state of the switches. During an OC condition on
any output, or a UV condition on the +5V, +3.3V or +12V
outputs, a LOW (0V) is asserted on the FLTN output and all
MOSFETs are latched-off. The time to FLTN signal going
LOW and MOSFET latch-off is determined by a single
capacitor from the FLTN pin to ground. This added feature
allows the system OS to complete housekeeping activities in
preparation for an unplanned shut down of the affected card.
The FLTN latch is cleared when the PWRON input is toggled
low again. During initial power-up of the main VCC supply
(+12V), the PWRON input is inhibited from turning on the
switches, and the latch is held in the Reset state until the
VCC input is greater than 10V.
User programmability of the overcurrent threshold, fault
reporting response time, latch-off response time and turn-on
slew rate is provided. A resistor connected to the OCSET pin
programs the OC threshold. A capacitor may be added to
the FLTN pin to adjust both the delay time to reporting a fault
and the latch-off of the supplies after an OC or UV event.
Capacitors connected to the gate pins set the turn-on rate. In
addition the HIP1011A has also been enhanced to tolerate
spurious system noise.
Features
• Adjustable Delay Time for Turn-Off and Fault Reporting
• Controls All PCI Supplies: +5V, +3.3V, +12V, -12V
• Internal MOSFET Switches for +12V and -12V Outputs
•
P
Interface for On/Off Control and Fault Reporting
• Adjustable Overcurrent Protection for All Supplies
• Provides Fault Isolation
• Adjustable Turn-On Slew Rate
• Minimum Parts Count Solution
• No Charge Pump
•
Pb-Free Available (RoHS Compliant)
Applications
• PCI Hot Plug
• CompactPCI
Ordering Information
PART NUMBER
HIP1011ACB
HIP1011ACBZA
(See Note)
HIP1011ACB-T
HIP1011ACBZA-T
(See Note)
TEMP. RANGE
(
o
C)
0 to 70
0 to 70
0 to 70
0 to 70
PACKAGE
16 Ld SOIC
16 Ld SOIC
(Pb-free)
Tape and Reel
Tape and Reel (Pb-free)
PKG.
DWG. #
M16.15
M16.15
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
HIP1011A
(SOIC)
TOP VIEW
M12VIN
FLTN
3V5VG
V
CC
12VIN
3VISEN
3VS
OCSET
1
2
3
4
5
6
7
8
16 M12VO
15 M12VG
14 12VG
13 GND
12 12VO
11 5VISEN
10 5VS
9
PWRON
FN4631 Rev 5.00
November 16, 2004
Page 1 of 11
HIP1011A
Typical Application
3.3V,
7.6A OUT
3.3V INPUT
ITF86130SK8T
5m, 1%
12V,
0.5A OUT
-12V,
0.1A OUT
5V,
5A OUT
5m, 1%
5V INPUT
ITF86130SK8T
-12V INPUT
HIP1011A
M12VIN
FLTN
3V5VG
V
CC
12VIN
3VISEN
3VS
OCSET
6.04k
1%
M12VO
M12VG
12VG
GND
12VO
5VISEN
5VS
PWRON
0.033F
0.033F
0.033F
12V INPUT
(OPTIONAL)
POWER CONTROL INPUT
NOTE: All capacitors are10%.
FAULT OUTPUT (ACTIVE LOW)
Simplified Schematic
SET (LOW = FAULT)
5VREF
FAULT LATCH
LOW = FAULT
COMP
-
+ 4.6V
FLTN
INHIBIT
V
CC
V
CC
V
CC
5V ZENER
REFERENCE
5VREF
V
OCSET
/17
COMP
V
CC
3V5VG
12VIN
POWER-ON
RESET
LOW WHEN V
CC
< 10V
COMP
+
-
-
+
V
OCSET
/0.8
+
V
CC
12VG
0.3
V
OCSET
/13.3
+
-
5VISEN
3VS
3VISEN
12VIN
+
-
+
-
RESET
COMP
-
+ 2.9V
INHIBIT
COMP
-
+ 10.8V
INHIBIT
V
CC
5VS
V
CC
100A
OCSET
V
CC
PWRON
V
OCSET
HIGH = FAULT
COMP
HIGH = SWITCHES ON
COMP
-
+
V
OCSET
/3.3
+
0.7
GND
-
M12VIN
FN4631 Rev 5.00
November 16, 2004
-
12VO
M12VIN
M12VG
M12VO
Page 2 of 11
HIP1011A
Pin Descriptions
PIN NO.
1
2
3
4
5
6
7
8
DESIGNATOR
M12VIN
FLTN
3V5VG
VCC
12VIN
3VISEN
3VS
OCSET
FUNCTION
-12V Input
Fault Output
3.3V/5V Gate Output
12V V
CC
Input
12V Input
3.3V Current Sense
3.3V Source
Overcurrent Set
DESCRIPTION
-12V Supply Input. Also provides power to the -12V overcurrent circuitry.
5V CMOS Fault Output; LOW = FAULT. A capacitor may be placed from this pin to ground
to provide delay time to fault notification and power supply latch-off.
Drive the gates of the 3.3V and 5V MOSFETs. Connect a capacitor to ground to set the start-
up ramp. During turn on, this capacitor is charged with a 25A current source.
Connect to unswitched 12V supply.
Switched 12V supply input.
Connect to the load side of the current sense resistor in series with source of external 3.3V
MOSFET.
Connect to source of 3.3V MOSFET. This connection along with pin 6 (3VISEN) senses the
voltage drop across the sense resistor.
Connect a resistor from this pin to ground to set the overcurrent trip point of all four switches.
All four over current trips can be programmed by changing the value of this resistor. The
default (6.04k1%) is compatible with the maximum allowable currents as outlined in the
PCI specification.
Controls all four switches. High to turn switches ON, Low to turn them OFF.
Connect to source of 5V MOSFET switch. This connection along with pin 11 (5VISEN)
senses the voltage drop across the sense resistor.
Connect to the load side of the current sense resistor in series with source of external 5V
MOSFET.
Switched 12V output.
Connect to common of power supplies.
9
10
11
12
13
14
PWRON
5VS
5VISEN
12VO
GND
12VG
Power On Control
5V Source
5V Current Sense
Switched 12V Output
Ground
Gate of Internal PMOS Connect a capacitor between 12VG and 12VO to set the start up ramp for the +12V supply.
This capacitor is charged with a 25A current source during start-up. The UV circuitry is
enabled after the voltage on 12VG is less than 400mV. Therefore, if the capacitor on the pin
3 (3V5VG) is more than 25% larger than the capacitor on pin 14 (12VG) a false UV may be
detected during start up.
Gate of Internal NMOS Connect a capacitor between M12VG and M12VO to set the start up ramp for the M12V
supply. This capacitor is charged with 25A during start up.
Switched -12V
Output
Switched 12V Output.
15
16
M12VG
M12VO
FN4631 Rev 5.00
November 16, 2004
Page 3 of 11
HIP1011A
Absolute Maximum Ratings
V
CC
, 12VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +14.0V
12VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
12VIN
+0.5V
12VO, 12VG, 3V5VG . . . . . . . . . . . . . . . . . . . . . -0.5V to V
CC
+0.5V
M12VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -15.0V to +0.5V
M12VO, M12VG. . . . . . . . . . . . . . . . . . . . . . V
M12VIN
-0.5V to +0.5V
3VISEN, 5VISEN . . . . . . . . . . . -0.5V to the Lesser of V
CC
or +7.0V
Voltage, Any Other Pin . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3A
M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8A
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4KeV (HBM)
Thermal Information
Thermal Resistance (Typical, Note 1)
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
105
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . .125
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(SOIC - Lead Tips Only)
Die Characteristics
Number of Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
Operating Conditions
VCC Supply Voltage Range. . . . . . . . . . . . . . . . . . +10.8V to +13.2V
12V,
5V and 3.3V Input Supply Tolerances
10%
12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to +0.5A
M12VO Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . .0 to +0.1A
Temperature Range (T
A
) . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1.
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief 379 for details.
2. All voltages are relative to GND, unless otherwise specified.
Electrical Specifications
PARAMETER
5V/3.3V SUPPLY CONTROL
5V Overcurrent Threshold
5V Overcurrent Threshold Voltage
5V Overcurrent Threshold Voltage
5V Undervoltage Trip Threshold
Nominal 5.0V and 3.3V Input Supply Voltages,
V
CC
= 12VIN = 12V, M12VIN = -12V, T
A
= T
J
= 0 to 70
o
C, Unless Otherwise Specified
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
I
OC5V
V
OC5V_1
V
OC5V_2
V
5VUV
t
5VUV
t
ON5V
IB
5VS
IB
5VISEN
I
OC3V
V
OC3V_1
V
OC3V_2
V
3VUV
t
3VUV
t
ON3V
IB
3VS
IB
3VISEN
Vout_lo_35VG
Vout_hi_35VG
IC
3V5VG
See Typical Application Diagram
V
OCSET
= 0.6V
V
OCSET
= 1.2V
-
30
66
4.42
-
7.1
36
72
4.65
150
6.5
-26
-140
9.0
49
95
2.86
150
6.5
-26
-140
0.1
11.1
25.0
-
42
79
4.75
350
-
-20
-110
-
56
102
2.97
350
-
-20
-110
0.4
-
27.5
A
mV
mV
V
ns
ms
A
A
A
mV
mV
V
ns
ms
A
A
V
V
A
5V Undervoltage Fault Response Time
5V Turn-On Time
(PWRON High to 5VOUT = 4.75V)
5VS Input Bias Current
5VISEN Input Bias Current
3V Overcurrent Threshold
3V Overcurrent Threshold Voltage
3V Overcurrent Threshold Voltage
3V Undervoltage Trip Threshold
3V Undervoltage Fault Response Time
3V Turn-On Time
(PWRON High to 3VOUT = 3.00V)
3VS Input Bias Current
3VISEN Input Bias Current
3V5VG Vout Low
3V5VG Vout High
Gate Output Charge Current
C
3V5VG
= 0.022F, C
5VOUT
= 2000F,
R
L
= 1
PWRON = High
PWRON = High
See Typical Application Diagram
V
OCSET
= 0.6V
V
OCSET
= 1.2V
-
-40
-160
-
42
88
2.74
-
C
3V5VG
= 0.022F, C
3VOUT
= 2000F,
R
L
= 0.43
PWRON = High
PWRON = High
PWRON = Low, FLTN = Low
PWRON = High, FLTN = High
PWRON = High, V
3V5VG
= 2V
-
-40
-160
-
10.5
22.5
FN4631 Rev 5.00
November 16, 2004
Page 4 of 11
HIP1011A
Electrical Specifications
PARAMETER
Gate Turn-On Time
(PWRON High to 3V5VG = 11V)
Gate Turn-Off Time
Gate Turn-Off Time
+12V SUPPLY CONTROL
On Resistance of Internal PMOS
Overcurrent Threshold
Overcurrent Threshold
12V Undervoltage Trip Threshold
Undervoltage Fault Response Time
Gate Charge Current
Turn-On Time
(PWRON High to 12VG = 1V)
Turn-Off Time
Turn-Off Time
-12V SUPPLY CONTROL
On Resistance of Internal NMOS
Overcurrent Threshold
Overcurrent Threshold
Gate Output Charge Current
Turn-On Time
(PWRON High to M12VG = -1V)
Turn-On Time
(PWRON High to M12VO = -10.8V)
Turn-Off Time
Turn-Off Time
M12VIN Input Bias Current
CONTROL I/O PINS
Supply Current
OCSET Current
Overcurrent to Fault Response Time
Overcurrent to Fault Response Time
Overcurrent to Fault Response Time
PWRON Threshold Voltage
FLTN Output Low Voltage
FLTN Output High Voltage
FLTN Output Latch Threshold
12V Power On Reset Threshold
V
THPWRON
V
FLTN,OL
V
FLTN,OH
V
FLTN,TH
V
POR,TH
V
CC
Voltage Falling
I
FLTN
= 2mA
I
FLTN
= 0 to -4mA
I
VCC
I
OCSET
t
OC
FLTN Cap = 100pF
FLTN Cap = 1000pF
FLTN Cap = 10F
4
95
-
-
-
0.8
-
3.9
1.45
9.4
5
100
500
2200
30
1.6
0.6
4.3
1.8
10
5.8
105
960
-
-
2.1
0.9
4.9
2.25
10.6
mA
A
ns
ns
s
V
V
V
V
V
IB
M12VIN
r
DS(ON)M12
I
OC12V_1
I
OC12V_2
IC
M12VG
t
ONM12V
t
ONM12V
t
OFFM12V
PWRON = High, I
D
= 0.1A,
T
A
= T
J
= 25
o
C
V
OCSET
= 0.6V
V
OCSET
= 1.2V
PWRON = High, V
3VG
= -4V
C
M12VG
= 0.022F
C
M12VG
= 0.022F, C
M12VO
= 50F,
R
L
= 120
C
M12VG
= 0.1F, M12VG
C
M12VG
= 0.022F, M12VG Falling 90%
to 10%
PWRON = High
0.5
0.15
0.30
22.5
-
-
-
-
-
0.7
0.18
0.37
25
160
16
18
3
2
0.9
0.25
0.50
27.5
300
-
23
-
2.6
A
A
A
s
ms
s
s
mA
r
DS(ON)12
I
OC12V_1
I
OC12V_2
V
12VUV
t
12VUV
IC
12VG
t
ON12V
t
OFF12V
PWRON = High, V
12VG
= 3V
C
12VG
= 0.022F
C
12VG
= 0.1F, 12VG
C
12VG
= 0.022F, 12VG Rising
10% - 90%
PWRON = High, I
D
= 0.5A,
T
A
= T
J
= 25
o
C
V
OCSET
= 0.6V
V
OCSET
= 1.2V
0.18
0.6
1.25
10.5
-
23.5
-
-
-
0.3
0.75
1.50
10.8
150
25.0
16
9
3
0.35
0.9
1.8
11.15
-
28.5
20
12
-
A
A
V
ns
A
ms
s
s
Nominal 5.0V and 3.3V Input Supply Voltages,
V
CC
= 12VIN = 12V, M12VIN = -12V, T
A
= T
J
= 0 to 70
o
C, Unless Otherwise Specified
(Continued)
SYMBOL
t
ON3V5V
t
OFF3V5V
TEST CONDITIONS
C
3V5VG
= 0.1F
C
3V5VG
= 0.1F, 3V5VG from 9.5V to 1V
C
3V5VG
= 0.022F, 3V5VG Falling 90% to
10%
MIN
-
-
-
TYP
280
13
2
MAX
500
17
-
UNITS
s
s
s
FN4631 Rev 5.00
November 16, 2004
Page 5 of 11