FAN7529 Critical Conduction Mode PFC Controller
April 2007
FAN7529
Critical Conduction Mode PFC Controller
Features
Low Total Harmonic Distortion (THD)
Precise Adjustable Output Over-Voltage Protection
Open-Feedback Protection and Disable Function
Zero Current Detector
150µs Internal Start-up Timer
MOSFET Over-Current Protection
Under-Voltage Lockout with 3.5V Hysteresis
Low Start-up (40µA) and Operating Current (1.5mA)
Totem Pole Output with High State Clamp
+500/-800mA
Peak Gate Drive Current
8-Pin DIP or 8-Pin SOP
Description
The FAN7529 is an active power factor correction (PFC)
controller for boost PFC applications that operates in crit-
ical conduction mode (CRM). It uses the voltage mode
PWM that compares an internal ramp signal with the
error amplifier output to generate MOSFET turn-off sig-
nal. Because the voltage-mode CRM PFC controller does
not need rectified AC line voltage information, it saves the
power loss of the input voltage sensing network neces-
sary for the current-mode CRM PFC controller.
FAN7529 provides many protection functions, such as
over-voltage protection, open-feedback protection, over-
current protection, and under-voltage lockout protection.
The FAN7529 can be disabled if the INV pin voltage is
lower than 0.45V and the operating current decreases to
65µA. Using a new variable on-time control method,
THD is lower than the conventional CRM boost PFC ICs.
Applications
Adapter
Ballast
LCD TV, CRT TV
SMPS
Related Application Notes
AN-6026
-
Design of Power Factor Correction Circuit
Using FAN7529
Ordering Information
Part Number
FAN7529N
FAN7529M
FAN7529MX
Operating Temp.
Range
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
Pb-Free
Yes
Yes
Yes
Package
8-DIP
8-SOP
8-SOP
Packing Method
Rail
Rail
Tape & Reel
Marking
Code
FAN7529
FAN7529
FAN7529
© 2006 Fairchild Semiconductor Corporation
FAN7529 Rev. 1.0.2
www.fairchildsemi.com
FAN7529 Critical Conduction Mode PFC Controller
Typical Application Diagrams
L
AC
IN
V
AUX
N
AUX
D
V
O
R
ZCD
R2 ZCD
C
O
V
CC
MOT
CS
COMP
R1
GND
FAN7529 Rev. 00
FAN7529
INV
Figure 1. Typical Boost PFC Application
Internal Block Diagram
V
CC
8
UVLO
2.5V
Ref
Internal
Bias
V
ref1
V
CC
12V
8.5V
Disable
Timer
Drive
Output
7 OUT
ZCD 5
6.7V
1.4V 1.5V
Zero Current
Detector
S
Q
R
OVP
2.675V
2.5V
CS
4
40k
8pF
0.8V
Current Protection
Comparator
Disable
0.45V 0.35V
Ramp
Signal
Saw Tooth
MOT 3
Generator
2.9V
1V Offset
V
ref1
Error
Amplifier
Gm
1V~5V
Range
2
COMP
1 INV
6
GND
FAN7529 Rev. 00
Figure 2. Functional Block Diagram of FAN7529
© 2006 Fairchild Semiconductor Corporation
FAN7529 Rev. 1.0.2
2
www.fairchildsemi.com
FAN7529 Critical Conduction Mode PFC Controller
Pin Assignments
V
CC
8
OUT
7
GND
6
ZCD
5
YWW
FAN7529
1
INV
2
COMP
3
MOT
4
CS
FAN7529 Rev. 00
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
Name
INV
COMP
Description
This pin is the inverting input of the error amplifier. The output voltage of the boost PFC
converter should be resistively divided to 2.5V.
This pin is the output of the transconductance error amplifier. Components for output
voltage compensation should be connected between this pin and GND.
This pin is used to set the slope of the internal ramp. The voltage of this pin is main-
tained at 2.9V. If a resistor is connected between this pin and GND, current flows out of
the pin and the slope of the internal ramp is proportional to this current.
This pin is the input of the over-current protection comparator. The MOSFET current is
sensed using a sensing resistor and the resulting voltage is applied to this pin. An
internal RC filter is included to filter switching noise.
This pin is the input of the zero current detection block. If the voltage of this pin goes
higher than 1.5V, then goes lower than 1.4V, the MOSFET is turned on.
This pin is used for the ground potential of all the pins. For proper operation, the signal
ground and the power ground should be separated.
This pin is the gate drive output. The peak sourcing and sinking current levels are
+500mA and -800mA respectively. For proper operation, the stray inductance in the
gate driving path must be minimized.
This pin is the IC supply pin. IC current and MOSFET drive current are supplied using
this pin.
3
MOT
4
CS
5
6
ZCD
GND
7
OUT
8
V
CC
© 2006 Fairchild Semiconductor Corporation
FAN7529 Rev. 1.0.2
3
www.fairchildsemi.com
FAN7529 Critical Conduction Mode PFC Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. T
A
= 25°C unless otherwise specified.
Symbol
V
CC
I
OH
, I
OL
I
clamp
I
det
V
IN
T
J
T
A
T
STG
V
ESD_HBM
V
ESD_MM
V
ESD_CDM
Supply Voltage
Parameter
Peak Drive Output Current
Driver Output Clamping Diodes V
O
>V
CC
or V
O
<-0.3V
Detector Clamping Diodes
Error Amplifier, MOT, CS Input Voltages
Operating Junction Temperature
Operating Temperature Range
Storage Temperature Range
ESD Capability, Human Body Model
ESD Capability, Machine Model
ESD Capability, Charged Device Model
Value
V
Z
+500/-800
±10
±10
-0.3 to 6
150
-40 to 125
-65 to 150
2.0
300
500
Unit
V
mA
mA
mA
V
°C
°C
°C
kV
V
V
Thermal Impedance
(1)
Symbol
θ
JΑ
Note:
1. Regarding the test environment and PCB type, please refer to JESD51-2 and JESD51-10.
Parameter
Thermal Resistance, Junction-to-Ambient
8-DIP
8-SOP
Value
110
150
Unit
°C/W
°C/W
© 2006 Fairchild Semiconductor Corporation
FAN7529 Rev. 1.0.2
4
www.fairchildsemi.com
FAN7529 Critical Conduction Mode PFC Controller
Electrical Characteristics
V
CC
= 14V and T
A
= -40°C~125°C unless otherwise specified.
Symbol
V
th(start)
V
th(stop)
HY
(uvlo)
V
Z
I
st
I
CC
I
dcc
I
CC(dis)
V
ref1
ΔV
ref1
ΔV
ref2
I
b(ea)
I
source
I
sink
V
eao(H)
V
eao(Z)
g
m
V
mot
T
on(max)
Parameter
Start Threshold Voltage
Stop Threshold Voltage
UVLO Hysteresis
Zener Voltage
Start-up Supply Current
Operating Supply Current
Dynamic Operating Supply Current
Operating Current at Disable
Voltage Feedback Input Threshold1
Line Regulation
Temperature Stability of
Input Bias Current
Output Source Current
Output Sink Current
Output Upper Clamp Voltage
Zero Duty Cycle Output Voltage
Transconductance
(2)
Maximum On-Time Voltage
Maximum On-Time Programming
Current Sense Input Threshold
Voltage Limit
Input Bias Current
Current Sense Delay to Output
(2)
V
ref1(2)
Condition
V
CC
increasing
V
CC
decreasing
I
CC
= 20mA
V
CC
= V
th(start)
- 0.2V
Output no switching
50kHz, Cl=1nF
V
inv
= 0V
T
A
= 25°C
V
CC
= 14V ~ 20V
V
inv
= 1V ~ 4V
V
inv
= V
ref1
- 0.1V
V
inv
= V
ref1
+ 0.1V
V
inv
= V
ref1
- 0.1V
Min.
11
7.5
3.0
20
Typ.
12
8.5
3.5
22
40
1.5
2.5
Max.
13
9.5
4.0
24
70
3.0
4.0
95
2.535
10.0
0.5
Unit
V
V
V
V
µA
mA
mA
µA
V
mV
mV
µA
µA
µA
UNDER-VOLTAGE LOCKOUT SECTION
SUPPLY CURRENT SECTION
20
2.465
65
2.500
0.1
20
ERROR AMPLIFIER SECTION
-0.5
-12
12
5.4
0.9
90
6.0
1.0
115
2.900
24
6.6
1.1
140
3.016
29
V
V
µmho
V
µs
MAXIMUM ON-TIME SECTION
R
mot
= 40.5kΩ
R
mot
= 40.5kΩ, T
A
= 25°C
2.784
19
CURRENT SENSE SECTION
V
CS(limit)
I
b(cs)
t
d(cs)
Note:
2. These parameters, although guaranteed by design, are not tested in production.
0.7
V
CS
= 0V ~ 1V
dV/dt = 1V/100ns,
from 0V to 5V
-1.0
0.8
-0.1
350
0.9
1.0
500
V
µA
ns
© 2006 Fairchild Semiconductor Corporation
FAN7529 Rev. 1.0.2
5
www.fairchildsemi.com
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