CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Analog Specifications
SYMBOL
R
TOTAL
Over recommended operating conditions unless otherwise stated.
TEST CONDITIONS
W, U versions respectively
-20
V
CC
= 3.3V @ 25°C
Wiper current = V
CC
/R
TOTAL
70
10/10/25
Voltage at pin from GND to V
CC
0.1
1
MIN
TYP
(Note 1)
10, 50
+20
200
MAX
UNIT
k
%
pF
µA
PARAMETER
R
H
to R
L
Resistance
R
H
to R
L
Resistance Tolerance
R
W
C
H
/C
L
/C
W
I
LkgDCP
Wiper Resistance
Potentiometer Capacitance (Note 15)
Leakage on DCP Pins (Note 15)
VOLTAGE DIVIDER MODE
(0V @ RL
i
; V
CC
@ RH
i
; measured at RW
i
, unloaded; i = 0 or 1)
INL (Note 6)
Integral Non-linearity
Monotonic over all tap positions
U option
W option
Full-scale Error
U option
W option
DCP to DCP Matching
Any two DCPs at same tap position, same
voltage at all RH terminals, and same
voltage at all RL terminals
DCP Register set to 80 hex
-1
-0.5
0
0
-7
-2
-2
1
0.5
-1
-1
1
0.5
7
2
0
0
2
LSB
(Note 2)
LSB
(Note 2)
LSB
(Note 2)
LSB
(Note 2)
LSB
(Note 2)
ppm/°C
DNL (Note 5) Differential Non-linearity
ZSerror
(Note 3)
FSerror
(Note 4)
V
MATCH
(Note 7)
Zero-scale Error
TC
V
(Note 8) Ratiometric Temperature Coefficient
±4
RESISTOR MODE
(Measurements between RW
i
and RL
i
with RH
i
not connected, or between RW
i
and RH
i
with RL
i
not
connected. i = 0 or 1)
RINL
(Note 12)
RDNL
(Note 11)
Roffset
(Note 10)
Integral Non-linearity
Differential Non-linearity
Offset
DCP Register set to 00 hex, U option
DCP Register set to 00 hex, W option
R
MATCH
(Note 13)
TC
R
(Note 14)
DCP to DCP Matching
Resistance Temperature Coefficient
Any two DCPs at the same tap position with
the same terminal voltages.
DCP register set between 20 hex and FF
hex
DCP register set between 20 hex and
FF hex. Monotonic over all tap positions
-1
-0.5
0
0
-2
±45
1
0.5
1
0.5
7
2
2
MI
(Note 9)
MI
(Note 9)
MI
(Note 9)
MI
(Note 9)
MI
(Note 9)
ppm/°C
FN8212 Rev 2.00
July 18, 2006
Page 3 of 12
X95820
Operating Specifications
Over the recommended operating conditions unless otherwise specified.
SYMBOL
I
CC1
I
CC2
I
SB
PARAMETER
V
CC
Supply Current
(Volatile write/read)
V
CC
Supply Current
(nonvolatile write)
V
CC
Current (standby)
TEST CONDITIONS
f
SCL
= 400kHz;SDA = Open; (for I
2
C,
Active, Read and Volatile Write States only)
f
SCL
= 400kHz; SDA = Open; (for I
2
C,
Active, Nonvolatile Write State only)
V
CC
= +5.5V,
I
2
C
Interface in Standby State
V
CC
= +3.6V,
I
2
C
Interface in Standby State
I
LkgDig
Leakage Current, at Pins A0, Voltage at pin from GND to V
CC
A1, A2, SDA, SCL, and WP
Pins
DCP Wiper Response Time
Power-on Recall Voltage
V
CC
Ramp Rate
Power-up Delay
V
CC
above Vpor, to DCP Initial Value Register recall
completed, and
I
2
C
Interface in standby state
SCL falling edge of last bit of DCP Data Byte to
wiper change
Minimum V
CC
at which memory recall occurs
1.8
0.2
3
-10
MIN
TYP
(Note 1)
MAX
1
3
5
2
10
UNITS
mA
mA
µA
µA
µA
t
DCP
(Note 15)
Vpor
VccRamp
t
D
(Note 15)
1
2.6
µs
V
V/ms
ms
EEPROM SPECS
EEPROM Endurance
EEPROM Retention
SERIAL INTERFACE SPECS
V
IL
WP, A2, A1, A0, SDA, and
SCL input buffer LOW
voltage
WP, A2, A1, A0, SDA, and
SCL Input Buffer HIGH
Voltage
SDA and SCL input buffer
hysterisis
SDA Output Buffer LOW
Voltage, Sinking 4mA
WP, A2, A1, A0, SDA, and
SCL Pin Capacitance
SCL Frequency
Pulse Width Suppression
Any pulse narrower than the max spec is
Time at SDA and SCL Inputs suppressed.
SCL Falling Edge to SDA
Output Data Valid
Time the Bus Must be Free
Before the Start of a New
Transmission
Clock LOW Time
Clock HIGH Time
START Condition Setup
Time
START Condition Hold Time
SCL falling edge crossing 30% of V
CC
, until SDA
exits the 30% to 70% of V
CC
window.
SDA crossing 70% of V
CC
during a STOP condition,
to SDA crossing 70% of V
CC
during the following
START condition.
Measured at the 30% of V
CC
crossing.
Measured at the 70% of V
CC
crossing.
SCL rising edge to SDA falling edge. Both crossing
70% of V
CC
.
From SDA falling edge crossing 30% of V
CC
to SCL
falling edge crossing 70% of V
CC
.
1300
-0.3
0.3*Vcc
V
Temperature
75°C
150,000
50
Cycles
Years
V
IH
0.7*Vcc
Vcc+0.3
V
Hysterisis
(Note 15)
V
OL
(Note 15)
Cpin
(Note 15)
f
SCL
t
IN
(Note 15)
t
AA
(Note 15)
t
BUF
(Note 15)
t
LOW
t
HIGH
t
SU:STA
t
HD:STA
0.05*
Vcc
0
0.4
10
400
50
900
V
V
pF
kHz
ns
ns
ns
1300
600
600
600
ns
ns
ns
ns
FN8212 Rev 2.00
July 18, 2006
Page 4 of 12
X95820
Operating Specifications
Over the recommended operating conditions unless otherwise specified.
(Continued)
SYMBOL
t
SU:DAT
t
HD:DAT
t
SU:STO
t
HD:STO
PARAMETER
Input Data Setup Time
Input Data Hold Time
TEST CONDITIONS
From SDA exiting the 30% to 70% of V
CC
window, to SCL rising edge crossing 30% of V
CC
From SCL rising edge crossing 70% of V
CC
to SDA
entering the 30% to 70% of V
CC
window.
MIN
100
0
600
600
0
20 +
0.1 * Cb
20 +
0.1 * Cb
10
1
250
250
400
TYP
(Note 1)
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
pF
k
STOP Condition Setup Time From SCL rising edge crossing 70% of V
CC
, to SDA
rising edge crossing 30% of V
CC
.
STOP Condition Setup Time From SDA rising edge to SCL falling edge. Both
As the demand for switching power supplies continues to grow in many industries, measuring and analyzing the power loss of the next generation of switching power supplies is critical. This article des...
FPGA's processing power is powerful, but when performing programmed tasks, using state machines to implement them is sometimes not as simple as writing programs in CPUs. In FPGAs, you can also use log...
I have a CC3200 schematic file that needs to be opened, but it is in BRD format. To import it into AD, I need to install Cadence Allegro. However, I have found several versions (16.2, 16.5) and instal...
When using sizeof to check in VC5416, the bus is 16-bitint, char, and double, which are 1 1 2 respectively, but on the PC they are 1 4 8.What's going on?...
I need to convert floating point to string, and I found a library function in C that can do it, gcvt, fcvt and other functions, which are included in the stdlib header file, but when I use them, I get...
Event: The company simultaneously released its 2017 annual report and the first quarter report of 2018. In 2017, the company achieved revenue of 8.886 billion yuan, a year-on-year increase of 48.01...[Details]
1. Test conditions Hardware: STM32L432KC Main frequency: 80MHz Compiler: IAR 8.20.1 Compiler options: High Speed no size constraints CRC generator polynomial: 0x782f 2. Test Method The softwar...[Details]
When the domestic discussion about "ZTE being banned" was hot, Alibaba officially announced the acquisition of chip supplier
Zhongtianwei
, but the investment amount was not disclosed. At t...[Details]
I have been working on this i2c for several days. Many people on the Internet say that this is a problem with the ST package library, and they basically talk about the STM32F1 series of chips, and ev...[Details]
Serial Port: 一. USART_ITConfig(USART1, USART_IT_TXE, ENABLE): As long as the transmit register is empty, there will always be an interrupt. Therefore, if you are not sending data, turn off the tran...[Details]
Security PPP is a new model of urban video surveillance projects: 1) The government and social capital establish a project company in a certain proportion; 2) The project company participates in the ...[Details]
Recently, the relevant person in charge of the Energy Conservation Division of the Energy Conservation and Technology Equipment Department of the National Energy Administration said on the issue of...[Details]
Overview
Lightning is a strong discharge phenomenon that occurs between thunderstorm clouds and between thunderstorm clouds and the earth due to severe convective weather. Lightning is gen...[Details]
The application of millimeter wave technology in mobile communications also involves a series of technical problems, including the large propagation loss of millimeter waves and the susceptibility ...[Details]
This program uses the eight-channel ADC single acquisition mode. According to the configuration, ADC12SC will automatically reset after the conversion is completed in the single mode, so it is necess...[Details]
At the beginning of the new year of 2018, after the release of the national photovoltaic policy, we found that the state’s support for village-level poverty alleviation power stations has not weake...[Details]
First of all, security practitioners have never felt that AI can be used as deeply as today. Although Antelope Cloud is a platform manufacturer, it has always been interested in AI and AI- specific...[Details]
On May 16, in response to
the public opinion storm caused by
Lenovo's
"
5G
voting" incident,
Lenovo
Holdings Chairman and
Lenovo
Group Founder Liu Chuanzhi, Lenovo Gr...[Details]
According to TechRadar, given rumors that
Google
is developing a Pixel Watch
,
the
recently renamed Wear OS
smartwatch
operating system may soon be able to show its full cap...[Details]
Microcontroller MCU
京公网安备 11010802033920号
EEWORLD
