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FIN1028K8X

Description
DUAL LINE RECEIVER, PDSO8
Categorysemiconductor    Analog mixed-signal IC   
File Size1MB,10 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric Compare View All

FIN1028K8X Overview

DUAL LINE RECEIVER, PDSO8

FIN1028K8X Parametric

Parameter NameAttribute value
Number of functions2
Number of terminals8
Minimum operating temperature-40 Cel
Maximum operating temperature85 Cel
Processing package description0.150 INCH, MS-012, SOIC-8
each_compliYes
EU RoHS regulationsYes
stateActive
Interface TypeLINE RECEIVER
Input propertiesDIFFERENTIAL
Interface standardsEIA-644; TIA-644
jesd_30_codeR-PDSO-G8
jesd_609_codee3
moisture_sensitivity_level1
utput_low_current_max0.0080 Am
Packaging MaterialsPLASTIC/EPOXY
ckage_codeSOP
ckage_equivalence_codeSOP8,.25
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE
eak_reflow_temperature__cel_260
wer_supplies__v_3.3
qualification_statusCOMMERCIAL
eceive_delay_max2.5 ns
Number of receiver bits2
seated_height_max1.75 mm
sub_categoryLine Driver or Receivers
Maximum supply voltage9 mA
Rated supply voltage3.3 V
Minimum supply voltage3 V
Maximum supply voltage3.6 V
surface mountYES
CraftsmanshipCMOS
Temperature levelINDUSTRIAL
terminal coatingMATTE TIN
Terminal formGULL WING
Terminal spacing1.27 mm
Terminal locationDUAL
ime_peak_reflow_temperature_max__s_30
length4.9 mm
width3.9 mm
FIN1028 3.3V LVDS 2-Bit High Speed Differential Receiver
March 2001
Revised May 2004
FIN1028
3.3V LVDS 2-Bit High Speed Differential Receiver
General Description
This dual receiver is designed for high speed interconnects
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The receiver translates LVDS levels, with a typical dif-
ferential input threshold of 100 mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even
at high frequencies. This device is ideal for high speed
transfer of clock and data.
The FIN1028 can be paired with its companion driver, the
FIN1027, or any other LVDS driver.
Features
s
Greater than 400Mbs data rate
s
3.3V power supply operation
s
0.4ns maximum differential pulse skew
s
2.5ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Fail safe protection for open-circuit, shorted and
terminated conditions
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Flow-through pinout simplifies PCB layout
Ordering Code:
Order Number
FIN1028M
(Note 1)
FIN1028K8X
(Preliminary)
FIN1028MPX
(Preliminary)
Package Number
M08A
MAB08A
MLP08C
Package Description
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
[TAPE and REEL]
8-Terminal Molded Leadless Package (MLP) Dual, MO-229, 2mm Square
[TAPE and REEL]
Note 1:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pin Descriptions
Pin Name
R
OUT1
, R
OUT2
R
IN1+
, R
IN2+
R
IN1−
, R
IN2−
V
CC
GND
Description
LVTTL Data Outputs
Non-inverting LVDS Inputs
Inverting LVDS Inputs
Power Supply
Ground
Connection Diagrams
Pin Assignment for SOIC
Function Table
Input
R
IN+
L
H
R
IN+
H
L
Outputs
R
OUT
L
H
H
(Top View)
Terminal Assignments for MLP
Fail Safe Condition
H
=
HIGH Logic Level
L
=
LOW Logic Level
Fail Safe
=
Open, Shorted, Terminated
(Top Through View)
© 2004 Fairchild Semiconductor Corporation
DS500503
www.fairchildsemi.com

FIN1028K8X Related Products

FIN1028K8X FIN1028 FIN1028_04 FIN1028MPX
Description DUAL LINE RECEIVER, PDSO8 DUAL LINE RECEIVER, PDSO8 DUAL LINE RECEIVER, PDSO8 DUAL LINE RECEIVER, PDSO8
Number of functions 2 2 2 -
Number of terminals 8 8 8 -
Minimum operating temperature -40 Cel -40 Cel -40 Cel -
Maximum operating temperature 85 Cel 85 Cel 85 Cel -
Processing package description 0.150 INCH, MS-012, SOIC-8 0.150 INCH, MS-012, SOIC-8 0.150 INCH, MS-012, SOIC-8 -
each_compli Yes Yes Yes -
EU RoHS regulations Yes Yes Yes -
state Active Active Active -
Interface Type LINE RECEIVER LINE RECEIVER LINE RECEIVER -
Input properties DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL -
Interface standards EIA-644; TIA-644 EIA-644; TIA-644 EIA-644; TIA-644 -
jesd_30_code R-PDSO-G8 R-PDSO-G8 R-PDSO-G8 -
jesd_609_code e3 e3 e3 -
moisture_sensitivity_level 1 1 1 -
utput_low_current_max 0.0080 Am 0.0080 Am 0.0080 Am -
Packaging Materials PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY -
ckage_code SOP SOP SOP -
ckage_equivalence_code SOP8,.25 SOP8,.25 SOP8,.25 -
packaging shape RECTANGULAR RECTANGULAR RECTANGULAR -
Package Size SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE -
eak_reflow_temperature__cel_ 260 260 260 -
wer_supplies__v_ 3.3 3.3 3.3 -
qualification_status COMMERCIAL COMMERCIAL COMMERCIAL -
eceive_delay_max 2.5 ns 2.5 ns 2.5 ns -
Number of receiver bits 2 2 2 -
seated_height_max 1.75 mm 1.75 mm 1.75 mm -
sub_category Line Driver or Receivers Line Driver or Receivers Line Driver or Receivers -
Maximum supply voltage 3.6 V 3.6 V 3.6 V -
Rated supply voltage 3.3 V 3.3 V 3.3 V -
Minimum supply voltage 3 V 3 V 3 V -
surface mount YES YES YES -
Craftsmanship CMOS CMOS CMOS -
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL -
terminal coating MATTE TIN MATTE TIN MATTE TIN -
Terminal form GULL WING GULL WING GULL WING -
Terminal spacing 1.27 mm 1.27 mm 1.27 mm -
Terminal location DUAL DUAL DUAL -
ime_peak_reflow_temperature_max__s_ 30 30 30 -
length 4.9 mm 4.9 mm 4.9 mm -
width 3.9 mm 3.9 mm 3.9 mm -
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