ISL97516
NOT RECOMMENDED FOR NEW DESIG
NS
RECOMMENDED REPLACEMENT PART
ISL97519A
DATASHEET
FN9261
Rev 6.00
March 28, 2014
600kHz/1.2MHz PWM Step-Up Regulator
The ISL97516 is a high frequency, high efficiency step-up
voltage regulator operated at constant frequency PWM mode.
With a 2.0A typical switch current limit and 200m MOSFET, it
can deliver over 90% efficiency. The selectable 600kHz and
1.2MHz allows smaller inductors and faster transient
response. An external compensation pin gives the user greater
flexibility in setting frequency compensation allowing for the
use of low ESR Ceramic output capacitors.
When shut down, it draws <1µA of current and can operate
down to 2.3V input supply. These features along with 1.2MHz
switching frequency make it an ideal device for portable
equipment and TFT-LCD displays.
The ISL97516 is available in an 8 Ld MSOP package with a
maximum height of 1.1mm. The device is specified for
operation over the full -40°C to +85°C temperature range.
Features
• >90% Efficiency
• 2.0A, 200m Power MOSFET
• 2.3V to 5.5V Input
• 1.1*VIN to 25V Output
• 600kHz/1.2MHz Switching Frequency Selection
• Adjustable Soft-Start
• Internal Thermal Protection
• 1.1mm Max Height 8 Ld MSOP Package
• Pb-free (RoHS compliant)
Applications
• TFT-LCD displays
• DSL modems
• PCMCIA cards
• Digital cameras
• GSM/CDMA phones
• Portable equipment
• Handheld devices
FSEL
EN
SS
VDD
REFERENCE
GENERATOR
OSCILLATOR
SHUTDOWN
AND START-UP
CONTROL
LX
PWM LOGIC
CONTROLLER
COMPARATOR
FET
DRIVER
CURRENT
SENSE
GND
FB
GM
AMPLIFIER
COMP
FIGURE 1. BLOCK DIAGRAM
FN9261 Rev 6.00
March 28, 2014
Page 1 of 9
ISL97516
Pin Configuration
ISL97516
(8 LD MSOP)
TOP VIEW
COMP 1
FB 2
EN 3
GND 4
8 SS
7 FSEL
6 VDD
5 LX
Pin Descriptions
PIN NUMBER
1
2
3
4
5
6
7
8
PIN NAME
COMP
FB
EN
GND
LX
VDD
FSEL
SS
DESCRIPTION
Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground.
Voltage feedback pin. Internal reference is 1.294V nominal. Connect a resistor divider from V
OUT
.
V
OUT
= 1.294V (1 + R
1
/R
2
). See “Typical Application Circuit” on page 2.
Shutdown control pin. Pull EN low to turn off the device.
Analog and power ground.
Power switch pin. Connected to the drain of the internal power MOSFET.
Analog power supply input pin.
Frequency select pin. When FSEL is set low, switching frequency is set to 620kHz. When connected to high or
V
DD
, switching frequency is set to 1.25MHz.
Soft-start control pin. Connect a capacitor to control the converter start-up.
Typical Application Circuit
R
3
3.9k
C
5
4.7nF
1 COMP
R
1
85.2k
R
2
10k
2 FB
3 EN
4 GND
S1
SS 8
FSEL 7
VDD 6
LX 5
C
3
27nF
+ C
1
0.1µF 22µF
C
4
2.3V TO 5.5V
10µH
+ C
2
22µF
12V
D
1
Ordering Information
PART NUMBER
(Notes 2, 3)
ISL97516IUZ
ISL97516IUZ-T (Note 1)
ISL97516IUZ-TK (Note 1)
NOTES:
1. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL97516.
For more information on MSL please see techbrief
TB363.
7516Z
7516Z
7516Z
PART
MARKING
PACKAGE
(Pb-free)
8 Ld MSOP
8 Ld MSOP
8 Ld MSOP
PKG.
DWG. #
M8.118A
M8.118A
M8.118A
FN9261 Rev 6.00
March 28, 2014
Page 2 of 9
ISL97516
Absolute Maximum Ratings
(T
A
= +25°C)
LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5V
COMP, FB, EN, SS, FSEL to GND . . . . . . . . . . . . . . . . . . -0.3V to (V
DD
+0.3V)
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Ambient Temperature . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135°C
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise
noted, all tests are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Specifications
temperature range, -40°C to +85°C.
PARAMETER
IQ1
IQ2
IQ3
V
FB
I
B-FB
V
DD
V
IN
= 3.3V, V
OUT
= 12V, I
OUT
= 0mA, FSEL = GND, T
A
= -40°C to +85°C. Boldface limits apply over the operating
MIN
(Note 4)
MAX
(Note 4)
5
DESCRIPTION
Quiescent Current - Shutdown
Quiescent Current - Not Switching
Quiescent Current - Switching
Feedback Voltage
Feedback Input Bias Current
Input Voltage Range
FSEL = 0V
FSEL = V
DD
EN = 0V
CONDITIONS
TYP
1
0.7
3
UNIT
µA
mA
EN = V
DD
, FB = 1.3V
EN = V
DD
, FB = 1.0V
1.272
4
1.309
0.5
5.5
mA
V
µA
V
%
%
A
1.294
0.01
2.3
85
85
1.7
EN = 0V
V
DD
= 2.7V, I
LX
= 1A
VSW = 27V
3V < V
IN
< 5.5V, V
OUT
= 12V
V
IN
= 3.3V, V
OUT
= 12V, I
O
= 30mA to 200mA
FSEL = 0V
FSEL = V
DD
500
1000
92
90
2.0
0.01
0.2
0.01
0.2
0.3
620
1250
D
MAX
- 600kHz Maximum Duty Cycle
D
MAX
- 1.2MHz Maximum Duty Cycle
I
LIM
I
EN
r
DS(ON)
I
LX-LEAK
V
OUT
/V
IN
V
OUT
/I
OUT
f
OSC1
f
OSC2
V
IL
V
IH
G
M
V
DD-ON
HYS
I
SS
OTP
Current Limit - Max Peak Input Current
Shutdown Input Bias Current
Switch ON-Resistance
Switch Leakage Current
Line Regulation
Load Regulation
Switching Frequency Accuracy
Switching Frequency Accuracy
EN, FSEL Input Low Level
EN, FSEL Input High Level
Error Amp Tranconductance
V
DD
UVLO On Threshold
V
DD
UVLO Hysteresis
Soft-Start Charge Current
Over-Temperature Protection
0.5
µA
3
µA
%
%
740
1500
0.5
kHz
kHz
V
V
1.5
I
= 5µA
70
2.1
130
2.2
100
4
6
150
8
150
2.3
1µ/
V
mV
µA
°C
NOTE:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN9261 Rev 6.00
March 28, 2014
Page 3 of 9
ISL97516
Typical Performance Curves
95
90
85
V
IN
= 5V, V
O
= 12V, f
s
= 1.25MHz
80
75
70
65
60
V
IN
= 5V, V
O
= 9V, f
s
= 620kHz
V
IN
= 5V, V
O
= 9V, f
s
= 1.25MHz
0
200
400
600
800
1000
V
IN
= 5V, V
O
= 12V, f
s
= 620kHz
92
90
88
EFFICIENCY (%)
86
84
82
80
78
76
74
0
100
200
V
IN
= 3.3V, V
O
= 12V,
f
s
= 620kHz
V
IN
= 3.3V, V
O
= 12V,
f
s
= 1.25MHz
V
IN
= 3.3V, V
O
= 9V,
f
s
= 1.25MHz
300
400
500
V
IN
= 3.3V, V
O
= 9V,
f
s
= 620kHz
EFFICIENCY (%)
I
OUT
(mA)
I
OUT
(mA)
FIGURE 2. BOOST EFFICIENCY vs I
OUT
FIGURE 3. BOOST EFFICIENCY vs I
OUT
0.9
0.8
LOAD REGULATION (%)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
200
V
IN
= 5V, V
O
= 12V,
f
s
= 620kHz
400
600
800
1000
V
IN
= 5V, V
O
= 9V,
f
s
= 620kHz
V
IN
= 5V, V
O
= 12V,
f
s
= 1.25MHz
V
IN
= 5V, V
O
= 9V,
f
s
= 1.25MHz
LOAD REGULATION (%)
0.7
V
IN
= 3.3V, V
O
= 12V,
0.6
0.5
f
s
= 1.25MHz
V
IN
= 3.3V, V
O
= 9V,
f
s
= 1.25MHz
V
IN
= 3.3, V
O
= 9V,
0.4
0.3
0.2
0.1
0
V
IN
= 3.3, V
O
= 12V,
f
s
= 620kHz
0
100
200
300
400
500
f
s
= 1.25kHz
I
OUT
(mA)
I
OUT
(mA)
FIGURE 4. LOAD REGULATION vs I
OUT
FIGURE 5. LOAD REGULATION vs I
OUT
0.6
V
O
= 12V
0.5
LINE REGULATION (%)
0.4
0.3
0.2
0.1
0
-0.1
V
O
= 9V, I
O
= 80mA
V
O
= 12V, I
O
= 80mA
f
s
= 620kHz
2
3
4
5
6
f
s
= 1.25MHz
f
s
= 1.25MHz
V
O
= 9V, I
O
= 100mA
f
s
= 620kHz
V
O
= 12V, I
O
= 80mA
V
IN
= 3.3V
f
s
= 600kHz
I
O
= 50mA TO 300mA
FIGURE 6. LINE REGULATION vs V
IN
FIGURE 7. TRANSIENT RESPONSE
FN9261 Rev 6.00
March 28, 2014
Page 4 of 9
ISL97516
Typical Performance Curves
V
O
= 12V
(Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
I
O
= 50mA TO 300mA
1.0
0.9
POWER DISSIPATION (W)
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
870mW
JA
=
V
IN
= 3.3V
f
s
= 1.2MHz
SO
+1 P8
15
°C
/W
M
0
25
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
FIGURE 8. TRANSIENT RESPONSE
FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
0.6
POWER DISSIPATION (W)
0.5
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
486mW
0.4
0.3
0.2
0.1
0.0
JA
=
SO
+2 P 8
06
°C
/W
M
0
25
50
75 85
100
125
AMBIENT TEMPERATURE (°C)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Applications Information
The ISL97516 is a high frequency, high efficiency boost
regulator operated at constant frequency PWM mode. The
boost converter stores energy from an input voltage source
and deliver it to a higher output voltage. The input voltage
range is 2.3V to 5.5V and output voltage range is 5V to 25V.
The switching frequency is selectable between 600kHz and
1.2MHz allowing smaller inductors and faster transient
response. An external compensation pin gives the user greater
flexibility in setting output transient response and tighter load
regulation. The converter soft-start characteristic can also be
controlled by external C
SS
capacitor. The EN pin allows the
user to completely shutdown the device.
as shown in Figure 12, the internal power FET turns on and the
Schottky diode is reverse biased and cuts off the current flow
to the output. The output current is supplied from the output
capacitor. The voltage across the inductor is V
IN
and the
inductor current ramps up in a rate of V
IN
/L, L is the
inductance. The inductance is magnetized and energy is stored
in the inductor. The change in inductor current is shown in
Equation 1:
V
IN
I
L1
=
t1
---------
L
D
-
t1
= ---------
f
SW
D
=
Duty Cycle
I
OUT
-
V
O
= ---------------
t
1
C
OUT
Boost Converter Operations
Figure 11 shows a boost converter with all the key
components. In steady state operating and continuous
conduction mode where the inductor current is continuous, the
boost converter operates in two cycles. During the first cycle,
(EQ. 1)
FN9261 Rev 6.00
March 28, 2014
Page 5 of 9
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