EEWORLDEEWORLDEEWORLD

Part Number

Search

531DB583M000DGR

Description
CMOS/TTL Output Clock Oscillator, 583MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
Download Datasheet Parametric View All

531DB583M000DGR Overview

CMOS/TTL Output Clock Oscillator, 583MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531DB583M000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency583 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS/TTL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
GitHub usage
I downloaded the source code from GitHub countless times, and submitted the code using GitHub for the first timeIt is very simple to use. Let me share my GitHub usage process.1. Register on GitHub fir...
littleshrimp MEMS sensors
STM8Sconst constant storage location
When making an interface menu, a lot of menu interfaces will be used.For example, unsigned char const *tmp="System initialization..."How to put this constant into the code space in STM8S without occup...
zzp2658 stm32/stm8
When copper is being coated on the board, the connection between the pad and the copper is too thin. How can I adjust it?
I connected the copper pad to the ground, but the connection line between the pad and the copper is too thin (only 10mil). How can I make it thicker?...
~沐浴阳光~ PCB Design
Urgent, please help me, thank you very much
tm4c123用串口读取数据时,数据能读,但是iic上的数据却读不了了(没加串口前是能读的) 为甚么会冲突#include "User_Uart.h" #include "driverlib/uart.h" #include "inc/hw_uart.h"/**函数名: User_Uart_Init(void)*描述:串口初始化函数*输入:无*输出:无*调用:内部调用*/ void User_Ua...
wanghao123456 TI Technology Forum
The problem of two always blocks assigning values to a reg type variable at the same time
[align=left][font=宋体]The problem of two [/font]always[font=宋体] blocks assigning values to a [/font]reg[font=宋体] type variable at the same time [/font][/align][align=left] [/align][align=left][font=宋体]...
miaoxikui FPGA/CPLD
Even my posts were deleted, ah...
Is it because I’m advertising for DJYOS? The Spring and Autumn Period and the Warring States Period was one of the most prosperous eras in Chinese culture. All the various schools of thought traveled ...
whplcyz Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1825  1835  1077  2199  740  37  22  45  15  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号