IDT70T633S12BFGI datasheet, PDF

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IDT70T633S12BFGI: DescriptionDual-Port SRAM, 512KX18, 12ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HIEGHT, 0.80 MM, PITCH, GREEN, FPBGA-208; Categorystorage storage; File Size433KB，27 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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IDT70T633S12BFGI Overview

Dual-Port SRAM, 512KX18, 12ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HIEGHT, 0.80 MM, PITCH, GREEN, FPBGA-208

IDT70T633S12BFGI Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	BGA
package instruction	LFBGA, BGA208,17X17,32
Contacts	208
Reach Compliance Code	compliant
ECCN code	3A991.B.2.A
Maximum access time	12 ns
I/O type	COMMON
JESD-30 code	S-PBGA-B208
JESD-609 code	e1
length	15 mm
memory density	9437184 bit
Memory IC Type	DUAL-PORT SRAM
memory width	18
Humidity sensitivity level	3
Number of functions	1
Number of ports	2
Number of terminals	208
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	512KX18
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Encapsulate equivalent code	BGA208,17X17,32
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	2.5,2.5/3.3 V
Certification status	Not Qualified
Maximum seat height	1.5 mm
Maximum standby current	0.02 A
Minimum standby current	2.4 V
Maximum slew rate	0.395 mA
Maximum supply voltage (Vsup)	2.6 V
Minimum supply voltage (Vsup)	2.4 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	15 mm
Base Number Matches	1

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◆

Features

HIGH-SPEED 2.5V

512/256K x 18

ASYNCHRONOUS DUAL-PORT

STATIC RAM

WITH 3.3V 0R 2.5V INTERFACE

◆

IDT70T633/1S

◆

True Dual-Port memory cells which allow simultaneous

access of the same memory location

High-speed access

– Commercial: 10/12/15ns (max.)

– Industrial: 10/12ns (max.)

RapidWrite Mode simplifies high-speed consecutive write

cycles

Dual chip enables allow for depth expansion without

external logic

IDT70T633/1 easily expands data bus width to 36 bits or

more using the Master/Slave select when cascading more

than one device

M/S = V

for

BUSY

output flag on Master,

M/S = V

for

BUSY

input on Slave

Busy and Interrupt Flags

On-chip port arbitration logic

U B

◆

Full hardware support of semaphore signaling between

ports on-chip

Fully asynchronous operation from either port

Separate byte controls for multiplexed bus and bus

matching compatibility

Sleep Mode Inputs on both ports

Supports JTAG features compliant to IEEE 1149.1 in

BGA-208 and BGA-256 packages

Single 2.5V (±100mV) power supply for core

LVTTL-compatible, selectable 3.3V (±150mV)/2.5V (±100mV)

power supply for I/Os and control signals on each port

Available in a 256-ball Ball Grid Array and 208-ball fine pitch

Ball Grid Array

Industrial temperature range (–40°C to +85°C) is available

for selected speeds

Green parts available, see ordering information

Functional Block Diagram

C E

Dout0-8_L

Dout9-17_L

Dout0-8_R

Dout9-17_R

512/256K x 18

MEMORY

ARRAY

I/O

- I/O

17L

Din_L

Din_R

I/O

- I/O

17R

18L

(1)

Address

Decoder

ADDR_L

ADDR_R

Address

Decoder

18R

(1)

TDI

C E

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

C E

TDO

JTAG

TCK

TMS

T R ST

R/W

B U S Y

L(2,3)

S EM

INT

L(3)

(4)

NOTES:

CONTROL

LOGIC

1. Address A

x is a NC for IDT70T631.

BUSY

is an input as a Slave (M/S=V

) and an output when it is a Master (M/S=V

BUSY

and

INT

are non-tri-state totem-pole outputs (push-pull).

4. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when asserted. OPTx,

INTx,

M/S and the

sleep mode pins themselves (ZZx) are not affected during sleep mode.

B U S Y

R(2,3)

M/S

SEM

IN T

R(3)

5670 drw 01

JUNE 2012

DSC-5670/9

IDT70T633S12BFGI Related Products

	IDT70T633S12BFGI	IDT70T633S10BFG	IDT70T633S10BFG8	IDT70T633S12BFGI8	IDT70T633S10BCGI
Description	Dual-Port SRAM, 512KX18, 12ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HIEGHT, 0.80 MM, PITCH, GREEN, FPBGA-208	Dual-Port SRAM, 512KX18, 10ns, CMOS, PBGA208, 15 X 15 MM, 1.40 MM HIEGHT, 0.80 MM, PITCH, GREEN, FPBGA-208	Multi-Port SRAM, 512KX18, 10ns, CMOS, PBGA208	Multi-Port SRAM, 512KX18, 12ns, CMOS, PBGA208	Dual-Port SRAM, 512KX18, 10ns, CMOS, PBGA256, 17 X 17 MM, 1.40 MM HIEGHT, 1 MM PITCH, GREEN, BGA-256
Is it lead-free?	Lead free	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
ECCN code	3A991.B.2.A	3A991	3A991	3A991.B.2.A	3A991.B.2.A
Maximum access time	12 ns	10 ns	10 ns	12 ns	10 ns
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B208	S-PBGA-B256
JESD-609 code	e1	e1	e1	e1	e1
memory density	9437184 bit	9437184 bit	9437184 bit	9437184 bit	9437184 bit
Memory IC Type	DUAL-PORT SRAM	DUAL-PORT SRAM	MULTI-PORT SRAM	MULTI-PORT SRAM	DUAL-PORT SRAM
memory width	18	18	18	18	18
Humidity sensitivity level	3	3	3	3	3
Number of ports	2	2	2	2	2
Number of terminals	208	208	208	208	256
word count	524288 words	524288 words	524288 words	524288 words	524288 words
character code	512000	512000	512000	512000	512000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	85 °C	70 °C	70 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-	-	-40 °C	-40 °C
organize	512KX18	512KX18	512KX18	512KX18	512KX18
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFBGA	LFBGA	FBGA	FBGA	LBGA
Encapsulate equivalent code	BGA208,17X17,32	BGA208,17X17,32	BGA208,17X17,32	BGA208,17X17,32	BGA256,16X16,40
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	GRID ARRAY, LOW PROFILE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	260	260	260	260	260
power supply	2.5,2.5/3.3 V	2.5,2.5/3.3 V	2.5,2.5/3.3 V	2.5,2.5/3.3 V	2.5,2.5/3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum standby current	0.02 A	0.01 A	0.01 A	0.02 A	0.02 A
Minimum standby current	2.4 V	2.4 V	2.4 V	2.4 V	2.4 V
Maximum slew rate	0.395 mA	0.405 mA	0.405 mA	0.395 mA	0.445 mA
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)	TIN SILVER COPPER	TIN SILVER COPPER	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	1 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	30	30	30	30	30
Base Number Matches	1	1	1	1	1
Parts packaging code	BGA	BGA	-	-	BGA
package instruction	LFBGA, BGA208,17X17,32	LFBGA, BGA208,17X17,32	-	FBGA, BGA208,17X17,32	LBGA, BGA256,16X16,40
Contacts	208	208	-	-	256
length	15 mm	15 mm	-	-	17 mm
Number of functions	1	1	-	-	1
Maximum seat height	1.5 mm	1.5 mm	-	-	1.5 mm
Maximum supply voltage (Vsup)	2.6 V	2.6 V	-	-	2.6 V
Minimum supply voltage (Vsup)	2.4 V	2.4 V	-	-	2.4 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	-	-	2.5 V
width	15 mm	15 mm	-	-	17 mm

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