FemtoClocks® Crystal-to-
3.3V, 2.5V LVPECL Frequency Synthesizer
G
ENERAL
D
ESCRIPTION
The 843002I-01 is a 2 output LVPECL synthesizer optimized to
generate Ethernet reference clock frequencies. Using a 25MHz
18pF parallel resonant crystal, the following frequencies can be
generated based on the 2 frequency select pins (F_SEL[1:0]):
156.25MHz, 125MHz, and 62.5MHz. The 843002I-01 uses
IDT’s FemtoClock
®
low phase noise VCO technology and can
achieve 1ps or lower typical rms phase jitter, easily meeting
Ethernetjitter requirements. The 843002I-01 is packaged in a
small 20-pin TSSOP package.
843002I-01
DATASHEET
F
EATURES
• Two 3.3V or 2.5V LVPECL outputs
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• Supports the following output frequencies:
156.25MHz, 125MHz and 62.5MHz
• VCO range: 560MHz - 680MHz
• RMS phase jitter @ 156.25MHz, using a 25MHz crystal
(1.875MHz-20MHz): 0.55ps (typical)
• Output skew: 30ps (maximum)
• Supply Voltage Modes
Core/Outputs
3.3/3.3
2.5/2.5
• -40°C to 85°C ambient operating temperature
• Available in lead-free RoHS-compliant package
F
REQUENCY
S
ELECT
F
UNCTION
T
ABLE
Inputs
F_SEL1
0
0
1
1
F_SEL0
0
1
0
1
M Divider
Value
25
25
25
25
N Divider
Value
4
5
10
5
Output Frequency
(25MHz Ref.)
156.25 (default)
125
62.5
125
P
IN
A
SSIGNMENT
nc
V
CCO
Q0
nQ0
MR
nPLL_SEL
nc
V
CCA
F_SEL0
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CCO
Q1
nQ1
V
EE
V
CC
nXTAL_SEL
REF_CLK
XTAL_IN
XTAL_OUT
F_SEL1
843002I-01
B
LOCK
D
IAGRAM
F_SEL[1:0]
Pulldown
nPLL_SEL
Pulldown
2
20-Lead TSSOP
6.5mm x 4.4mm x 0.92mm
package body
G Package
Q0
Top View
F_SEL[1:0]
00
01
10
11
÷4
(default)
÷5
÷10
÷5
nQ0
REF_CLK
Pulldown
1
1
Q1
nQ1
25MHz
XTAL_IN
XTAL_OUT
nXTAL_SEL
Pulldown
OSC
0
Phase
Detector
VCO
625MHz
(w/25MHz
Reference)
0
M = 25 (fixed)
MR
Pulldown
843002I-01 REVISION A 2/20/15
1
©2015 Integrated Device Technology, Inc.
843002I-01 DATA SHEET
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 7
2, 20
3, 4
5
Name
nc
V
CCO
Q0, nQ0
MR
Unused
Power
Ouput
Input
Type
Description
No connect.
Output supply pins.
Differential output pair. LVPECL interface levels.
Active HIGH Master Reset. When logic HIGH, the internal dividers are reset
causing the true outputs Qx to go low and the inverted outputs nQx
Pulldown
to go high. When logic LOW, the internal dividers and the outputs are en-
abled. LVCMOS/LVTTL interface levels.
Determines whether synthesizer is in PLL or bypass mode. LVCMOS/LVTTL
Pulldown
interface levels.
Analog supply pin.
Pulldown Frequency select pins. LVCMOS/LVTTL interface levels.
Core supply pin.
Parallel resonant crystal interface. XTAL_OUT is the output,
XTAL_IN is the input.
Pulldown LVCMOS/LVTTL reference clock input.
Selects between crystal or REF_CLK inputs as the the PLL Reference
Pulldown source. Selects XTAL inputs when LOW. Selects REF_CLK when HIGH.
LVCMOS/LVTTL interface levels.
Negative supply pins.
Differential output pair. LVPECL interface levels.
6
8
9, 11
10, 16
12, 13
14
15
17
18, 19
Pulldown
nPLL_SEL
V
CCA
F_SEL0,
F_SEL1
V
CC
XTAL_OUT,
XTAL_IN
REF_CLK
nXTAL_SEL
V
EE
nQ1, Q1
Input
Power
Input
Power
Input
Input
Input
Power
Output
NOTE: refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLDOWN
Parameter
Input Capacitance
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
kΩ
FEMTOCLOCKS® CRYSTAL-TO-
3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
2
REVISION A 2/20/15
843002I-01 DATA SHEET
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
73.2°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions
beyond those listed in the
DC Characteristics
or
AC Charac-
teristics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±10%, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
V
CCO
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
2.97
2.97
2.97
Typical
3.3
3.3
3.3
Maximum
3.63
3.63
3.63
130
13
Units
V
V
V
mA
mA
T
ABLE
3B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
V
CCO
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
2.375
2.375
2.375
Typical
2.5
2.5
2.5
Maximum
2.625
2.625
2.625
115
12
Units
V
V
V
mA
mA
T
ABLE
3C. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±10%
OR
2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input
High Current
Input
Low Current
REF_CLK, MR, nPLL_
SEL, nXTAL_SEL
REF_CLK, MR, nPLL_
SEL, nXTAL_SEL
Test Conditions
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
= V
IN
= 3.63V or 2.625V
V
CC
= V
IN
= 3.63V or 2.625V
-5
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
CC
+ 0.3
V
CC
+ 0.3
0.8
0.7
150
Units
V
V
V
V
µA
µA
REVISION A 2/20/15
3
FEMTOCLOCKS® CRYSTAL-TO-
3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
843002I-01 DATA SHEET
T
ABLE
3D. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±10%
OR
2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO
- 1.4
V
CCO
- 2.0
0.6
Typical
Maximum
V
CCO
- 0.9
V
CCO
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50 to V
CCO
- 2V.
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
NOTE: Characterized using an 18pF parallel resonant crystal.
22.4
Test Conditions
Minimum
Typical Maximum
25
27.2
50
7
1
Units
MHz
Ω
pF
mW
Fundamental
T
ABLE
5A. AC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±10%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
tsk(o)
tjit(Ø)
t
R
/ t
F
Parameter
Output Frequency
Output Skew; NOTE 1, 2
156.25MHz, (1.875MHz - 20MHz)
RMS Phase Jitter; NOTE 2, 3
Output Rise/Fall Time
125MHz, (1.875MHz - 20MHz)
62.5MHz, (1.875MHz - 20MHz)
20% to 80%
350
0.55
0.60
0.70
650
52
Test Conditions
F_SEL[1:0] = 00
F_SEL[1:0] = 01
F_SEL[1:0] = 10
Minimum
140
112
56
Typical
Maximum
170
136
68
30
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
odc
Output Duty Cycle
48
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at the output differential cross points.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 3: Measured using crystal input.
T
ABLE
5B. AC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
tsk(o)
tjit(Ø)
t
R
/ t
F
odc
Parameter
Output Frequency
Output Skew; NOTE 1, 2
156.25MHz, (1.875MHz - 20MHz)
RMS Phase Jitter; NOTE 2, 3
Output Rise/Fall Time
Output Duty Cycle
125MHz, (1.875MHz - 20MHz)
62.5MHz, (1.875MHz - 20MHz)
20% to 80%
350
48
0.55
0.60
0.74
650
52
Test Conditions
F_SEL[1:0] = 00
F_SEL[1:0] = 01
F_SEL[1:0] = 10
Minimum
140
112
56
Typical
Maximum
170
136
68
30
Units
MHz
MHz
MHz
ps
ps
ps
ps
ps
%
For Notes, see Table 5A above.
FEMTOCLOCKS® CRYSTAL-TO-
3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
4
REVISION A 2/20/15
843002I-01 DATA SHEET
T
YPICAL
P
HASE
N
OISE AT
156.25MH
Z
@ 3.3V
0
-10
-20
-30
-40
-50
10 Gigabit Ethernet Filter
156.25MHz
RMS Phase Noise Jitter
1.875MHz to 20MHz = 0.55ps (typical)
dBc
Hz
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
N
OISE
P
OWER
Raw Phase Noise Data
➤
Phase Noise Result by adding
10 Gigabit Ethernet Filter to raw data
100k
1M
10M
100M
O
FFSET
F
REQUENCY
(H
Z
)
REVISION A 2/20/15
5
FEMTOCLOCKS® CRYSTAL-TO-
3.3V, 2.5V LVPECL FREQUENCY SYNTHESIZER
➤
➤
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