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841S012BKIT

Description
Clock Generator, 250MHz, 8 X 8 MM, 0.925 MM HEIGHT, MO-220, VFQFN-56
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size298KB,21 Pages
ManufacturerIDT (Integrated Device Technology)
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841S012BKIT Overview

Clock Generator, 250MHz, 8 X 8 MM, 0.925 MM HEIGHT, MO-220, VFQFN-56

841S012BKIT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFN
package instructionVQCCN,
Contacts56
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeS-XQCC-N56
JESD-609 codee0
length8 mm
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency250 MHz
Package body materialUNSPECIFIED
encapsulated codeVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)225
Master clock/crystal nominal frequency25 MHz
Certification statusNot Qualified
Maximum seat height1 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width8 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
PRELIMINARY
CRYSTAL-TO-0.7V DIFFERENTIAL HCSL/
LVCMOS FREQUENCY SYNTHESIZER
ICS841S012I
G
ENERAL
D
ESCRIPTION
The ICS841S012I is an optimized PCIe, sRIO and
Gigabit Ethernet Frequency Synthesizer and a
HiPerClockS™
member of HiperClock s™ family of high perfor-
mance clock solutions from IDT. The ICS841S012I
uses a 25MHz parallel resonant crystal to gener-
ate 33.33MHz - 200MHz clock signals, replacing solutions
requiring multiple oscillator and fanout buffer solution. The
device supports ±0.25% center-spread, and -0.5% down-
spread clocking with two spread select pins (SSC[1:0]). The
VCO operates at frequency of 2GHz. The device has three
output banks: Bank A with two HCSL outputs, 100MHz –
250MHz; Bank B with seven 33.33MHz – 200MHz LVCMOS/
LVTTL outputs; and Bank C with one 33.33MHz – 200MHz
LVCMOS/LVTTL output.
F
EATURES
• Two 0.7V differential HCSL outputs (Bank A), configurable for
PCIe (100MHz or 250MHz) and sRIO (100MHz or 125MHz)
clock signals
Eight LVCMOS/LVTTL outputs (Banks B/C),
15Ω typical output impedance
Two REF_OUT LVCMOS/LVTTL clock outputs,
20Ω typical output impedance
• Selectable crystal oscillator interface, 25MHz, 18pF parallel
resonant crystal or one LVCMOS/LVTTL single-ended
reference clock input
• Supports the following output frequencies:
HCSL Bank A:
100MHz, 125MHz, 200MHz and 250MHz
LVCMOS/LVTTL Bank B/C:
33.33MHz, 50MHz, 66.67MHz,
100MHz, 125MHz, 133.33MHz, 166.67MHz and 200MHz
• VCO: 2GHz
• Spread spectrum clock: ±0.25% center-spread and
-0.5% down-spread
• PLL bypass and output enable
• RMS period jitter: 15ps (typical), QB outputs
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
All Banks A, B and C have their own dedicated frequency
select pins and can be independently set for the frequencies
mentioned above. The low jitter character istic of the
ICS841S012I makes it an ideal clock source for PCIe, sRIO
and Gigabit Ethernet applications. Designed for networking and
industrial applications, the ICS841S012I can also drive the high-
speed clock inputs of communication processors, DSPs,
switches and bridges.
P
IN
A
SSIGNMENT
V
DDOB
QB6
GND
QB5
V
DDOB
QB4
GND
QB3
V
DDOB
QB2
GND
QB1
QB0
56 55 54 53 52 51 50 49 48 47 46 45 44 43
V
DD
REF_OUT0
REF_OUT1
GND
GND
REF_IN
V
DD
REF_SEL
XTAL_IN
XTAL_OUT
BYPASS
REF_OE
nMR
V
DD
1
2
3
4
5
6
7
8
9
10
11
42
41
40
39
38
37
36
35
34
33
32
31
30
29
V
DDOC
QC
GND
QBC_OE
V
DDA
V
DDA
GND
GND
IREF
QA0
nQA0
QA1
nQA1
V
DD
ICS841S012I
56-Lead VFQFN
8mm x 8mm x 0.925mm
package body
K Package
Top View
12
13
14
15 16 17 18 19 20 21 22 23 24 25 26 27 28
F_SELB2
F_SELB1
F_SELB0
F_SELC2
F_SELC1
F_SELC0
F_SELA1
F_SELA0
QA_OE
SSC1
SSC0
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT
/ ICS
0.7V HCSL/LVCMOS FREQUENCY SYNTHESIZER
1
ICS841S012BKI REV. A MAY 1, 2008
GND
V
DD
GND
V
DDOB

841S012BKIT Related Products

841S012BKIT 841S012BKI
Description Clock Generator, 250MHz, 8 X 8 MM, 0.925 MM HEIGHT, MO-220, VFQFN-56 Clock Generator, 250MHz, 8 X 8 MM, 0.925 MM HEIGHT, MO-220, VFQFN-56
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFN QFN
package instruction VQCCN, VQCCN,
Contacts 56 56
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
JESD-30 code S-XQCC-N56 S-XQCC-N56
JESD-609 code e0 e0
length 8 mm 8 mm
Number of terminals 56 56
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Maximum output clock frequency 250 MHz 250 MHz
Package body material UNSPECIFIED UNSPECIFIED
encapsulated code VQCCN VQCCN
Package shape SQUARE SQUARE
Package form CHIP CARRIER, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 225 225
Master clock/crystal nominal frequency 25 MHz 25 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1 mm 1 mm
Maximum supply voltage 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface TIN LEAD TIN LEAD
Terminal form NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 30 30
width 8 mm 8 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Base Number Matches 1 1

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