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87608AYIT

Description
Processor Specific Clock Generator, 166.67MHz, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size159KB,15 Pages
ManufacturerIDT (Integrated Device Technology)
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87608AYIT Overview

Processor Specific Clock Generator, 166.67MHz, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32

87608AYIT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instruction7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
Contacts32
Reach Compliance Codenot_compliant
ECCN codeEAR99
JESD-30 codeS-PQFP-G32
JESD-609 codee0
length7 mm
Humidity sensitivity level3
Number of terminals32
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency166.67 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP32,.35SQ,32
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)240
power supply2.5/3.3,3.3 V
Master clock/crystal nominal frequency41.67 MHz
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width7 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches1
Low Voltage/Low Skew, 1:8 PCI/PCI-X
Zero Delay clock Generator
Data Sheet
87608I
G
ENERAL
D
ESCRIPTION
The 87608I has a selectable REF_CLK or crystal input. The
REF_CLK input accepts LVCMOS or LVTTL input levels.
The 87608I has a fully integrated PLL along with frequency
configurable clock and feedback outputs for multiplying and
regenerating clocks with “zero delay”.
The 87608I is a 1:8 PCI/PCI-X Clock Generator. The 87608I
has a selectable REF_CLK or crystal input. The REF_CLK input
accepts LVCMOS or LVTTL input levels. The 87608I has a fully
integrated PLL along with frequency configurable clock and
feedback outputs for multiplying and regenerating clocks with
“zero delay”. The PLL’s VCO has an operating range of 250MHz-
500MHz, allowing this device to be used in a variety of general
purpose clocking applications. For PCI/PCI-X applications in
particular, the VCO frequency should be set to 400MHz. This
can be accomplished by supplying 33.33MHz, 25MHz, 20MHz,
or 16.66MHz on the reference clock or crystal input and by
selecting ÷12, ÷16, ÷20, or ÷24, respectively as the feedback
divide value. The dividers on each of the two output banks can
then be independently configured to generate 33.33MHz (÷12),
66.66MHz (÷6), 100MHz (÷4), or 133.33MHz (÷3).
The 87608I is characterized to operate with its core supply
at 3.3V and each bank supply at 3.3V or 2.5V. The 87608I is
packaged in a small 7x7mm body LQFP, making it ideal for use
in space-constrained applications.
F
EATURES
Fully integrated PLL
Eight LVCMOS/LVTTL outputs, 15Ω typical output impedance
Selectable crystal oscillator interface or
LVCMOS/LVTTL REF_IN clock input
Maximum output frequency: 166.67MHz
Maximum crystal input frequency: 38MHz
Maximum REF_IN input frequency: 41.67MHz
Individual banks with selectable output dividers for
generating 33.333MHz, 66.66MHz, 100MHz and
133.333MHz
Separate feedback control for generating PCI / PCI-X
frequencies from a 16.66MHz or 20MHz crystal, or 25MHz
or 33.33MHz reference frequency
VCO range: 200MHz to 500MHz
Cycle-to-cycle jitter: 120ps (maximum), @ 3.3V
Period jitter, RMS: 20ps (maximum)
Output skew: 250ps (maximum)
Bank skew: 60ps (maximum)
Static phase offset: 160ps ± 160ps
Voltage Supply Modes:
V
DD
(core/inputs), V
DDA
(analog supply for PLL),
V
DDOA
(output bank A),
V
DDOB
(output bank B, REF_OUT, FB_OUT)
V
DD
/V
DDA
/V
DDOA
/V
DDOB
3.3/3.3/3.3/3.3
3.3/3.3/2.5/3.3
3.3/3.3/3.3/2.5
3.3/3.3/2.5/2.5
-40°C to 85°C ambient operating temperature
V
DDOB
P
IN
A
SSIGNMENT
XTAL_SEL
PLL_SEL
REF_IN
V
DDOA
XTAL2
XTAL1
V
DDA
Available in lead-free RoHS compliant package
32 31 30 29 28 27 26 25
QA0
QA1
GND
QA2
QA3
V
DDOA
MR
DIV_SELA0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
DIV_SELA1
DIV_SELB0
DIV_SELB1
FBDIV_SEL0
FBDIV_SEL1
V
DD
FB_IN
GND
24
QB0
QB1
GND
QB2
QB3
V
DDOB
REF_OUT
FB_OUT
ICS87608I
32-Lead LQFP
7mm x 7mm x 1.4mm
package body
Y package
Top View
23
22
21
20
19
18
17
©2016 Integrated Device Technology, Inc
1
Revision C January 25, 2016

87608AYIT Related Products

87608AYIT 87608AYI
Description Processor Specific Clock Generator, 166.67MHz, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 Processor Specific Clock Generator, 166.67MHz, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFP QFP
package instruction 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32 7 X 7 MM, 1.40 MM HEIGHT, MS-026, LQFP-32
Contacts 32 32
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
JESD-30 code S-PQFP-G32 S-PQFP-G32
JESD-609 code e0 e0
length 7 mm 7 mm
Humidity sensitivity level 3 3
Number of terminals 32 32
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Maximum output clock frequency 166.67 MHz 166.67 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Encapsulate equivalent code QFP32,.35SQ,32 QFP32,.35SQ,32
Package shape SQUARE SQUARE
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius) 240 240
power supply 2.5/3.3,3.3 V 2.5/3.3,3.3 V
Master clock/crystal nominal frequency 41.67 MHz 41.67 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1.6 mm 1.6 mm
Maximum supply voltage 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 20 20
width 7 mm 7 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches 1 1
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