EEWORLDEEWORLDEEWORLD

Part Number

Search

87339AMI-11LFT

Description
Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X 12.80 MM, 2.25 MM HEIGHT, ROHS COMPLIANT, MO-119, MS-013, SOIC-20
Categorylogic    logic   
File Size653KB,14 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric Compare View All

87339AMI-11LFT Online Shopping

Suppliers Part Number Price MOQ In stock  
87339AMI-11LFT - - View Buy Now

87339AMI-11LFT Overview

Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X 12.80 MM, 2.25 MM HEIGHT, ROHS COMPLIANT, MO-119, MS-013, SOIC-20

87339AMI-11LFT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSOIC
package instructionSOP, SOP20,.4
Contacts20
Reach Compliance Codecompliant
ECCN codeEAR99
series87339
Input adjustmentDIFFERENTIAL
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length12.8 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level1
Number of functions2
Number of inverted outputs
Number of terminals20
Actual output times4
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP20,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup2.1 ns
propagation delay (tpd)2.1 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.35 ns
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5 mm
Base Number Matches1
L
OW
S
KEW
,
÷2/4,÷4/5/6,
D
IFFERENTIAL
-
TO
-3.3V LVPECL C
LOCK
G
ENERATOR
G
ENERAL
D
ESCRIPTION
The ICS87339I-11 is a low skew, high perfor-
mance Differential-to-3.3V LVPECL Clock Gen-
HiPerClockS™
erator/Divider and a member of the HiPerClockS™
family of High Performance Clock Solutions
from IDT. The ICS87339I-11 has one differen-
tial clock input pair. The CLK, nCLK pair can accept most
standard differential input levels. The clock enable is
internally synchronized to eliminate runt pulses on the
outputs during asynchronous assertion/deassertion of the
clock enable pin.
ICS87339I-11
F
EATURES
Dual ÷2, ÷4 differential 3.3V LVPECL outputs;
Dual ÷4, ÷5, ÷6 differential 3.3V LVPECL outputs
One differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum clock input frequency: 1GHz
Translates any single ended input signal (LVCMOS, LVTTL,
GTL) to LVPECL levels with resistor bias on nCLK input
Output skew: 35ps (maximum)
Part-to-part skew: 385ps (maximum)
Bank skew: Bank A - 20ps (maximum)
Bank B - 20ps (maximum)
Propagation delay: 2.1ns (maximum)
LVPECL mode operating voltage supply range:
V
CC
= 3V to 3.6V, V
EE
= 0V
Available in both standard (RoHS5) and lead-free (RoHS 6)
packages
ICS
Guaranteed output and part-to-part skew characteristics
make the ICS87339I-11 ideal for clock distribution applica-
tions demanding well defined performance and repeatability.
B
LOCK
D
IAGRAM
DIV_SELA
QA0
nQA0
nCLK_EN
D
Q
LE
CLK
nCLK
÷2, ÷4
P
IN
A
SSIGNMENT
V
CC
nCLK_EN
DIV_SELB0
CLK
nCLK
RESERVED
MR
V
CC
DIV_SELB1
DIV_SELA
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
QA0
nQA0
QA1
nQA1
QB0
nQB0
QB1
nQB1
V
EE
R
QA1
nQA1
QB0
nQB0
÷4, ÷5, ÷6
ICS87339I-11
20-Lead TSSOP
6.50mm x 4.40mm x 0.92 package body
G Package
Top View
20-Lead SOIC, 300MIL
7.5mm x 12.8mm x 2.25mm package body
M Package
Top View
R
MR
DIV_SELB0
DIV_SELB1
QB1
nQB1
87339AGI-11
1
REV. A
March 3,
2009

87339AMI-11LFT Related Products

87339AMI-11LFT 87339AMI-11LF
Description Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X 12.80 MM, 2.25 MM HEIGHT, ROHS COMPLIANT, MO-119, MS-013, SOIC-20 Low Skew Clock Driver, 87339 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 7.50 X 12.80 MM, 2.25 MM HEIGHT, ROHS COMPLIANT, MO-119, MS-013, SOIC-20
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code SOIC SOIC
package instruction SOP, SOP20,.4 SOP, SOP20,.4
Contacts 20 20
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
series 87339 87339
Input adjustment DIFFERENTIAL DIFFERENTIAL
JESD-30 code R-PDSO-G20 R-PDSO-G20
JESD-609 code e3 e3
length 12.8 mm 12.8 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Humidity sensitivity level 1 1
Number of functions 2 2
Number of terminals 20 20
Actual output times 4 4
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Encapsulate equivalent code SOP20,.4 SOP20,.4
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260
power supply 3.3 V 3.3 V
Prop。Delay @ Nom-Sup 2.1 ns 2.1 ns
propagation delay (tpd) 2.1 ns 2.1 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.35 ns 0.35 ns
Maximum seat height 2.65 mm 2.65 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 7.5 mm 7.5 mm
Base Number Matches 1 1
How to resist interference
Hello everyone:I studied theory for four years in college and never participated in any major projects! When I was a graduate student, under the guidance of my teacher, I designed a multi-channel meri...
默默_223 ADI Reference Circuit
A fish under Linux, I can't understand what it said.
wanda the fish says: Today is Sweetmorn, the 19th day of The Aftermath in the YOLD 3176 Who knows what it means? Fedora9 version...
范小川 Talking
EEWORLD University Hall----Loop compensation is easy
Loop compensation is easy : https://training.eeworld.com.cn/course/291In the design and debugging of switching power supplies, the design and analysis of loop stability has always been a problem that ...
chenyy Analog electronics
Common ground problem of differential signal detection
[i=s]This post was last edited by milan111 on 2016-2-27 13:14[/i] For example, when a 485 bus receives differential signals, the signal sending and receiving ends may not share a common ground. Then w...
milan111 Analogue and Mixed Signal
About adding function keys, interrupt mode, application programs, and how to add functions to 2410
I was dizzy when I saw this operation today. InterruptInitialize function, I don’t quite understand it now. This is something at the driver level, I think. } // OEMInterruptEnable(SYSINTR_BUTTON,NULL,...
widb Embedded System
A practical precision rectifier circuit simulation model
There are many kinds of precision rectifier circuits, each with its own advantages and disadvantages. This one is considered to be more practical and can be seen in some products. I needed it for a pr...
kata Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 197  2492  1822  684  483  4  51  37  14  10 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号