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NSS35200CF8T1G_06

Description
35 V, 7 A, Low VCE(sat) PNP Transistor
File Size64KB,6 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet View All

NSS35200CF8T1G_06 Overview

35 V, 7 A, Low VCE(sat) PNP Transistor

NSS35200CF8T1G
35 V, 7 A, Low V
CE(sat)
PNP Transistor
ON Semiconductor’s e
2
PowerEdge family of low V
CE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (V
CE(sat)
) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical application are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e
2
PowerEdge devices to be
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
Features
http://onsemi.com
35 VOLTS
7.0 AMPS
PNP LOW V
CE(sat)
TRANSISTOR
EQUIVALENT R
DS(on)
78 mW
COLLECTOR
1, 2, 3, 6, 7, 8
This is a Pb−Free Device
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
Collector Current − Continuous
Collector Current − Peak
Electrostatic Discharge
Symbol
V
CEO
V
CBO
V
EBO
I
C
I
CM
ESD
Max
−35
−55
−5.0
−2.0
−7.0
Unit
Vdc
Vdc
Vdc
Adc
A
4
BASE
5
EMITTER
ChipFET]
CASE 1206A
STYLE 4
HBM Class 3
MM Class C
PIN
CONNECTIONS
C 8
1 C
2 C
3 C
4 B
1
2
3
4
MARKING
DIAGRAM
8
7
6
5
G4
M
G
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Total Device Dissipation
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Thermal Resistance, Junction−to−Lead #1
Total Device Dissipation
(Single Pulse < 10 sec)
Junction and Storage
Temperature Range
Symbol
P
D
(Note 1)
R
qJA
(Note 1)
P
D
(Note 2)
R
qJA
(Note 2)
R
qJL
P
Dsingle
(Notes 2 & 3)
T
J
, T
stg
Max
635
5.1
200
1.35
11
90
15
2.75
−55 to
+150
Unit
mW
mW/°C
°C/W
W
mW/°C
°C/W
°C/W
W
°C
C 7
C 6
E 5
G4 = Specific Device Code
M = Month Code
G
= Pb−Free Package
ORDERING INFORMATION
Device
NSS35200CF8T1G
Package
ChipFET
(Pb−Free)
Shipping
3000/
Tape & Reel
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ 100 mm
2
, 1 oz copper traces.
2. FR−4 @ 500 mm
2
, 1 oz copper traces.
3. Thermal response.
©
Semiconductor Components Industries, LLC, 2006
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1
March, 2006 − Rev. 5
Publication Order Number:
NSS35200CF8T1G/D
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