74LVX273
LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP
WITH CLEAR (5V TOLERANT INPUTS)
s
s
s
s
s
s
s
s
s
s
s
HIGH SPEED:
f
MAX
= 150 MHz (TYP.) at V
CC
= 3.3V
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
V
IL
= 0.8V, V
IH
= 2V at V
CC
=3V
LOW POWER DISSIPATION:
I
CC
= 4
µA
(MAX.) at T
A
=25°C
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
=3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4 mA (MIN) at V
CC
=3V
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
IMPROVED LATCH-UP IMMUNITY
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LVX273M
T&R
74LVX273MTR
74LVX273TTR
DESCRIPTION
The 74LVX273 is a low voltage CMOS OCTAL
D-TYPE FLIP-FLOP WITH CLEAR fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
Information signals applied to D inputs are
transferred to the Q outputs on the positive going
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independently of the other inputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V. It
combines high speed performance with the true
CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/10
74LVX273
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
50
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
T
stg
Storage Temperature
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Supply Voltage (note 1)
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time (note 2) (V
CC
= 3V)
Parameter
Value
2 to 3.6
0 to 5.5
0 to V
CC
-55 to 125
0 to 100
Unit
V
V
V
°C
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V
2) V
IN
from 0.8V to 2.0V
3/10
74LVX273
DC SPECIFICATIONS
Test Condition
Symbol
Parameter
V
CC
(V)
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
V
OL
Low Level Output
Voltage
2.0
3.0
3.0
I
I
I
CC
Input Leakage
Current
Quiescent Supply
Current
3.6
3.6
I
O
=-50
µA
I
O
=-50
µA
I
O
=-4 mA
I
O
=50
µA
I
O
=50
µA
I
O
=4 mA
V
I
= 5V or GND
V
I
= V
CC
or GND
T
A
= 25°C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.58
0.0
0.0
0.1
0.1
0.36
±
0.1
4
2.0
3.0
1.9
2.9
2.48
0.1
0.1
0.44
±
1
40
Typ.
Max.
Value
-40 to 85°C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.4
0.1
0.1
0.55
±
1
40
µA
µA
V
V
Max.
-55 to 125°C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
Max.
V
Unit
V
IH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
V
IL
V
V
OH
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
T
A
= 25°C
Min.
Typ.
0.3
-0.8
C
L
= 50 pF
2.0
-0.3
V
Max.
0.8
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
Unit
V
OLP
V
OLV
V
IHD
V
ILD
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input
(note 1, 3)
Dynamic Low
Voltage Input
(note 1, 3)
3.3
3.3
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
4/10
74LVX273
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
Test Condition
Symbol
Parameter
V
CC
(V)
2.7
2.7
3.3
(*)
3.3
(*)
t
PHL
Propagation Delay
Time
CLEAR to Q
3.3
(*)
3.3
(*)
5.0
(**)
5.0
(**)
2.7
3.3
(*)
2.7
3.3
(*)
2.7
3.3
(*)
2.7
3.3
(*)
2.7
3.3
(*)
2.7
2.7
3.3
(*)
Output to Output
Skew Time (note
1,2)
3.3
(*)
2.7
3.3
(*)
50
C
L
(pF)
15
50
15
50
15
50
15
50
50
50
T
A
= 25°C
Min.
Typ.
9.0
11.5
7.1
9.6
9.3
11.8
7.3
9.8
Max.
16.9
20.4
11.0
14.5
17.6
21.1
11.5
15.0
5.0
5.0
5.5
5.0
5.5
50
4.5
1.0
1.0
2.5
2.0
55
45
95
60
110
60
150
90
0.5
0.5
1.0
1.0
55
40
80
55
1.5
1.5
Value
-40 to 85°C
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max.
20.5
24.0
13.0
16.5
20.5
24.0
13.5
17.0
6.0
5.0
6.5
5.0
6.5
4.5
1.0
1.0
2.5
2.0
50
35
75
50
1.5
1.5
ns
MHz
-55 to 125°C
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max.
22.0
25.5
14.5
18.0
22.0
25.5
15.5
18.0
6.0
5.0
6.5
5.0
6.5
4.5
1.0
1.0
2.5
2.0
ns
ns
ns
ns
ns
ns
Unit
t
PLH
t
PHL
Propagation Delay
Time
CK to Q
t
W(L)
t
W
t
S
CLEAR pulse
Width, HIGH
CLOCK pulse
Width, HIGH
Setup Time Q to
CLOCK HIGH or
LOW
Hold Time Q to
CLOCK HIGH or
LOW
Recovery Time
CLEAR to Q
Maximum Clock
Frequency
t
h
t
REM
f
MAX
50
15
50
15
50
50
50
ns
t
OSLH
t
OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
±
0.3V
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
3.3
f
IN
= 10MHz
T
A
= 25°C
Min.
Typ.
5
40
Max.
10
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
Unit
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
ad. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/8 (per circuit)
5/10
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