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5962H0150201VZC

Description
RISC Microprocessor, 16-Bit, 12MHz, CMOS, CQFP132, QFP-132
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size371KB,55 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

5962H0150201VZC Overview

RISC Microprocessor, 16-Bit, 12MHz, CMOS, CQFP132, QFP-132

5962H0150201VZC Parametric

Parameter NameAttribute value
MakerCobham Semiconductor Solutions
Parts packaging codeQFP
package instructionQFF,
Contacts132
Reach Compliance Codeunknown
ECCN code3A001.A.1.A
Address bus width16
bit size16
boundary scanNO
maximum clock frequency12 MHz
External data bus width16
FormatFLOATING POINT
Integrated cacheNO
JESD-30 codeS-CQFP-F132
JESD-609 codee4
length24.13 mm
low power modeYES
Number of terminals132
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQFF
Package shapeSQUARE
Package formFLATPACK
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum seat height2.794 mm
speed12 MHz
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formFLAT
Terminal pitch0.635 mm
Terminal locationQUAD
total dose1M Rad(Si) V
width24.13 mm
uPs/uCs/peripheral integrated circuit typeMICROPROCESSOR, RISC
Base Number Matches1
Standard Products
UT1750AR RadHard RISC Microprocessor
Data Sheet
September 2001
FEATURES
q
Operates in either RISC (Reduced Instruction Set
Computer) mode or MIL-STD-1750A mode
q
Supports MIL-STD-1750A 32-bit floating-point
operations and 48-bit extended-precision floating-point
operations on chip
q
Built-in 9600 baud UART
q
Supports defined MIL-STD-1750A Console Mode of Operation
q
Full 64K-word address space. Expandable to 1M words with
optional MMU (operand port)
q
Register-oriented architecture has 21 user-accessible registers
q
Registers may be in 16-bit word or 32-bit double-word
configurations
RISC
MEMORY
CONTROL
BUS
ARBITRA-
TION
PROCES-
SOR
STATUS
q
Built-in multiprocessor bus arbitration and Direct Memory Access
support (DMA)
q
TTL-compatible I/O
q
Stable 1.5-micron CMOS technology
q
Full military operating range, -55°C to +125°C, in accordance
with MIL-PRF-38535 for Class Q and V
q
Typical radiation performance
-
-
-
-
Total dose: 1.0E6 rads(Si)
SEL Immune . 100 MeV-cm
2
/mg
LET
TH
(0.25) = 60 MeV-cm
2
/mg
Saturated Cross Section (cm
2
) per bit, 1.2E-7
- 2.3E-11 errors/bit-day, Adams to 90% geosynchronous heavy ion
q
Standard Military Drawing 5962-01502
16
UART
TIMCLK
TEST
UARTOUT
UARTIN
OE
WE
BRQ
BGNT
BUSY
BGACK
NUI1
NUI2
M1750
STATE1
MME
NUO3
CONSOLE
OSCOUT
OSCIN SYSCLK
OSCILLATOR
/CLOCK
SHIFT REG
PROCESSOR
CONTROL
LOGIC
IR
RISC MAP
32
GENERAL
PURPOSE
REGISTERS
BIT REG
TBR
RBR
TR
16
16
16
16
16
16
16
32
32
32
TB
IM
FR
PI
ST
SW
TEMP DEST
TEMP SRC
I/O
MUX
RISC DATA
RISC
ADDRESS
or O/P DISC
RISC
ADDRESS
SYSFL
BTERR
MPAR
MPROT
PFAIL
IOLINT1
IOLINT0
INT0-5
MRST
4
16
32
32
8
16
4
IC/ICs
RISC
ADD
MUX
I
N
T
E
R
R
U
P
T
S
32
ACC
32
16
PIPELINE
PR
A MUX
B MUX
BUS
CONTROL
16
32-BIT ALU
1750 SP
1750 PC
16
32
16
PS0-3
AS0-3
OPERAND
DATA
OP/IN
DTACK
M/IO
R /W R
AS
DS
OPERAND
ADDRESS
ADDR
MUX
6
Figure 1. UT1750AR Functional Block Diagram
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