813N2532AKILF datasheet, PDF - EEWORLD Datasheet

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813N2532AKILF: DescriptionClock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32; CategoryThe embedded processor and controller Microcontrollers and processors; File Size324KB，22 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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813N2532AKILF Overview

Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32

813N2532AKILF Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFN
package instruction	5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	S-XQCC-N32
JESD-609 code	e3
length	5 mm
Humidity sensitivity level	3
Number of terminals	32
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	156.25 MHz
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC32,.2SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Master clock/crystal nominal frequency	38.88 MHz
Certification status	Not Qualified
Maximum seat height	1 mm
Maximum slew rate	300 mA
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

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Jitter Attenuator & FemtoClock NG Multiplier

ICS813N2532I

DATA SHEET

General Description

The ICS813N2532I device uses IDT's fourth generation

FemtoClock

NG technology for optimal high clock frequency and

low phase noise performance, combined with a low power

consumption and high power supply noise rejection. The

ICS813N2532I is a PLL based synchronous multiplier that is

optimized for PDH or SONET to Ethernet clock jitter attenuation and

frequency translation.

The ICS813N2532I is a fully integrated Phase Locked loop utilizing a

FemtoClock NG Digital VCXO that provides the low jitter, high

frequency SONET/PDH output clock that easily meets OC-48 jitter

requirements. This VCXO technology simplifies PLL design by

replacing the pullable crystal requirement of analog VCXOs with a

fixed 27MHz generator crystal. Jitter attenuation down to 10Hz is

provided by an external loop filter. Pre-divider and output divider

multiplication ratios are selected using device selection control pins.

The multiplication ratios are optimized to support most common

clock rates used in PDH, SONET and Ethernet applications. The

device requires the use of an external, inexpensive fundamental

mode 27MHz crystal. The device is packaged in a space-saving

32-VFQFN package and supports commercial temperature range.

Features

•

Fourth generation FemtoClock® NG technology

Two LVPECL output pairs

Output frequencies: 19.44MHz, 25MHz, 125MHz, 155.52MHz and

156.25MHz

Two differential inputs support the following input types: LVPECL,

LVDS, LVHSTL, HCSL

Accepts input frequencies from 8kHz to 38.88MHz including

8kHz, 19.44MHz, 25MHz and 38.88MHz

Crystal interface optimized for a 27MHz, 10pF parallel resonant

crystal

Attenuates the phase jitter of the input clock by using a low-cost

fundamental mode crystal

Customized settings for jitter attenuation and reference tracking

using external loop filter connection

FemtoClock NG frequency multiplier provides low jitter, high

frequency output

Absolute pull range: ±100ppm

Power supply noise rejection (PSNR): -95dB (typical)

RMS phase jitter @ 156.25MHz, using a 27MHz crystal

(12kHz – 20MHz): 0.6ps (typical)

RMS phase jitter @ 155.52MHz, using a 27MHz crystal

(12kHz – 20MHz): 0.622ps (typical)

RMS phase jitter @ 125MHz, using a 27MHz crystal

(12kHz – 20MHz): 0.6ps (typical)

3.3V supply voltage

-40°C to 85°C ambient operating temperature

Available in lead-free (RoHS 6) package

Pin Assignment

XTAL_OUT

XTAL_IN

nCLK0

nCLK1

CLK0

CLK1

CCX

32 31 30 29 28 27 26 25

LF1

LF0

•

23 nQB

CCO

ISET 3

CLK_SEL

20 nQA

19 QA

FB_SEL

LOR 7

10 11 12 13 14 15 16

ODBSEL_1

ODBSEL_0

ODASEL_1

PDSEL_1

PDSEL_0

CCA

ODASEL_0

ICS813N2532I

32 Lead VFQFN

5mm x 5mm x 0.925mm package body

K Package

Top View

ICS813N2532AKI REVISION B JUNE 3, 2011

813N2532AKILF Related Products

	813N2532AKILF	813N2532AKILFT
Description	Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32
Is it Rohs certified?	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	QFN	QFN
package instruction	5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32	5 X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32
Contacts	32	32
Reach Compliance Code	compliant	compliant
ECCN code	EAR99	EAR99
JESD-30 code	S-XQCC-N32	S-XQCC-N32
JESD-609 code	e3	e3
length	5 mm	5 mm
Humidity sensitivity level	3	3
Number of terminals	32	32
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Maximum output clock frequency	156.25 MHz	156.25 MHz
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Encapsulate equivalent code	LCC32,.2SQ,20	LCC32,.2SQ,20
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	260
power supply	3.3 V	3.3 V
Master clock/crystal nominal frequency	38.88 MHz	38.88 MHz
Certification status	Not Qualified	Not Qualified
Maximum seat height	1 mm	1 mm
Maximum slew rate	300 mA	300 mA
Maximum supply voltage	3.465 V	3.465 V
Minimum supply voltage	3.135 V	3.135 V
Nominal supply voltage	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
Maximum time at peak reflow temperature	30	30
width	5 mm	5 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Base Number Matches	1	1

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