t e r / l o w p h a s e n o i s e V C X O f r o m I D T. T h e
HiPerClockS™
ICS810525I works in conjunction with a 25MHz
pullable crystal to generate an LVCMOS/LVTTL
output clock of 25MHz from an input clock of
5MHz. The frequency of the VCXO is adjusted by the VC
control voltage input. The output range is ±100ppm around
the nominal crystal frequency. The VC control voltage range
is 0 - V
DD
. The device is packaged in a small 16 TSSOP
package and is ideal for use on space constrained boards.
F
EATURES
•
One single-ended LVCMOS/LVTTL output
•
One single-ended clock accepts the following input types:
LVCMOS, LVTTL
•
Accepts input frequency of 5MHz
•
Attenuates the phase jitter of the input clock by using a low-
cost 25MHz pullable funamental mode VCXO crystal
•
VCXO PLL bandwidth can be optimized for jitter attenuation
and reference tracking
using external loop filter connection
•
Absolute pull range: 100ppm
•
Proprietary multiplier provides low jitter, high frequency output
•
RMS phase jitter @ 25MHz, using a 25MHz crystal
(1kHz – 1MHz): 0.27ps (typical)
•
Full 3.3V supply, or 3.3V core/2.5V output supply
•
-40°C to 85°C ambient operating temperature
•
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
B
LOCK
D
IAGRAM
XTAL_OUT
(External
Loop Filter Inputs)
P
IN
A
SSIGNMENT
nc
GND
Q
V
DDO
nc
nc
V
DDA
V
DD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
CLK
GND
LF1
LF0
XTAL_IN
XTAL_OUT
GND
XTAL_IN
25MHz
LF0 LF1
ICS810525I
CLK
Pulldown
5MHz
x5 VCXO
PLL
Q
16-Lead TSSOP
4.4mm x 5.0mm x 0.925mm package body
G Package
Top View
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
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