MBM29F004TC-70 datasheet, PDF - EEWORLD Datasheet

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MBM29F004TC-70: DescriptionFLASH MEMORY CMOS 4 M (512 K X 8) BIT; File Size279KB，53 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/

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MBM29F004TC-70 Overview

FLASH MEMORY CMOS 4 M (512 K X 8) BIT

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FUJITSU SEMICONDUCTOR

DATA SHEET

DS05-20876-3E

FLASH MEMORY

CMOS

4 M (512 K

8) BIT

MBM29F004TC/004BC-

70/

DESCRIPTION

The MBM29F004TC/BC is a 4 M-bit, 5.0 V-Only Flash memory organized as 512 K bytes of 8 bits each. The

MBM29F004TC/BC is offered in a 32-pin TSOP (1) and 32-pin QFJ (PLCC) packages. This device is designed

to be programmed in-system with the standard system 5.0 V V

supply. A 12.0 V V

is not required for write or

erase operations. The device can also be reprogrammed in standard EPROM programmers.

The standard MBM29F004TC/BC offers access times between 70 ns and 90 ns allowing operation of high-speed

microprocessors without wait states. To eliminate bus contention the device has separate chip enable (CE) , write

enable (WE) , and output enable (OE) controls.

The MBM29F004TC/BC is pin and command set compatible with JEDEC standard E

PROMs. Commands are

written to the command register using standard microprocessor write timings. Register contents serve as input

to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally latch

addresses and data needed for the programming and erase operations. Reading data out of the device is similar

to reading from 12.0 V Flash or EPROM devices.

(Continued)

PRODUCT LINE UP

Part No.

Ambient Temperature (

°C)

Max Address Access Time (ns)

Supply Voltage

Operation

Erase/Program

Voltage Consumption

(mW) (Max) TTL Standby mode

CMOS Standby mode

Max CE Access (ns)

Max OE Access (ns)

MBM29F004TC/BC

-70

−20

5.0 V

10%

193

275

5.5

0.0275

-90

−40

MBM29F004TC/004BC

-70/90

(Continued)

The MBM29F004TC/BC is programmed by executing the program command sequence. This will invoke the

Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths

and verifies proper cell margin. Each sector can be programmed and verified in less than 0.5 seconds. Erase

is accomplished by executing the erase command sequence. This will invoke the Embedded Erase Algorithm

which is an internal algorithm that automatically preprograms the array if it is not already programmed before

executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies

proper cell margin. Any individual sector is typically erased and verified within 1.0 second (if already completely

preprogrammed) .

This device also features a sector erase architecture. The sector erase mode allows for sectors of memory to

be erased and reprogrammed without affecting other sectors. The MBM29F004TC/BC is erased when shipped

from the factory.

The MBM29F004TC/BC device also features hardware sector group protection. This feature will disable both

program and erase operations in any combination of sectors of memory. This can be achieved in-system or via

programming equipment.

Fujitsu has implemented an Erase Suspend feature that enables the user to put erase on hold for any period of

time to read data from or program data to a non-busy sector. True background erase can thus be achieved.

The device features single 5.0 V power supply operation for both read and write functions. Internally generated

and regulated voltages are provided for the program and erase operations. A low V

detector automatically

inhibits write operations during power transitions. The end of program or erase is detected by Data Polling of

, or by the Toggle Bit I feature on DQ

output pin. Once the end of a program or erase cycle has been

completed, the device internally resets to the read mode.

Fujitsu's Flash technology combines years of EPROM and E

PROM experience to produce the highest levels

of quality, reliability, and cost effectiveness. The MBM29F004TC/BC memory electrically erases all bits within

a sector simultaneously via Fowler-Nordheim tunneling. The bytes are programmed one byte at a time using

the EPROM programming mechanism of hot electron injection.

PACKAGE

32-pin plastic TSOP (1)

Marking Side

32-pin plastic TSOP (1)

32-pin plastic QFJ (PLCC)

Marking Side

(FPT-32P-M24)

(FPT-32P-M25)

(LCC-32P-M02)

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