Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia.
Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use
http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
-
© Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via
salesaddresses@nexperia.com).
Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
74LV4051
8-channel analog multiplexer/demultiplexer
Rev. 6 — 17 March 2016
Product data sheet
1. General description
The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select
inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to
Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin
and function compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight
switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are
in the high-impedance OFF-state, independent of S0 to S2.
V
CC
and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E).
The V
CC
to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z)
can swing between V
CC
as a positive limit and V
EE
as a negative limit. V
CC
V
EE
may not
exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, V
EE
is connected to
GND (typically ground).
2. Features and benefits
Optimized for low-voltage applications: 1.0 V to 6.0 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Low ON resistance:
145
(typical) at V
CC
V
EE
= 2.0 V
80
(typical) at V
CC
V
EE
= 3.0 V
60
(typical) at V
CC
V
EE
= 4.5 V
Logic level translation:
To enable 3 V logic to communicate with
3
V analog signals
Typical ‘break before make’ built in
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
40 C
to +85
C
and from
40 C
to +125
C
NXP Semiconductors
74LV4051
8-channel analog multiplexer/demultiplexer
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74LV4051D
74LV4051DB
74LV4051PW
74LV4051BQ
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SO16
SSOP16
TSSOP16
Description
plastic small outline package; 16 leads;
body width 3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
Version
SOT109-1
SOT338-1
SOT403-1
SOT763-1
Type number
DHVQFN16 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals;
body 2.5
3.5
0.85 mm
4. Functional diagram
Fig 1.
Functional diagram
74LV4051
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 17 March 2016
2 of 26
NXP Semiconductors
74LV4051
8-channel analog multiplexer/demultiplexer
Fig 2.
Logic symbol
Fig 3.
IEC logic symbol
Fig 4.
Schematic diagram (one switch)
74LV4051
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 17 March 2016
3 of 26
NXP Semiconductors
74LV4051
8-channel analog multiplexer/demultiplexer
5. Pinning information
5.1 Pinning
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to V
CC
.
Fig 5.
Pin configuration SOT109-1, SOT338-1 and
SOT403-1
Fig 6.
Pin configuration for SOT763-1
5.2 Pin description
Table 2.
Symbol
E
V
EE
GND
S0, S1, S2
Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7
Z
V
CC
Pin description
Pin
6
7
8
11, 10, 9
13, 14, 15, 12, 1, 5, 2, 4
3
16
Description
enable input (active LOW)
supply voltage
ground supply voltage
select input
independent input or output
common output or input
supply voltage
74LV4051
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 17 March 2016
4 of 26
京公网安备 11010802033920号
EEWORLD
