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IDT79R3041-33PF9

Description
RISC Microprocessor, 32-Bit, 33MHz, CMOS, PQFP100, CAVITY-UP, TQFP-100
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size389KB,34 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT79R3041-33PF9 Overview

RISC Microprocessor, 32-Bit, 33MHz, CMOS, PQFP100, CAVITY-UP, TQFP-100

IDT79R3041-33PF9 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instructionLFQFP,
Contacts100
Reach Compliance Codecompliant
ECCN code3A001.A.3
Other featuresBURST BUS; 5 PIPELINE STAGES
Address bus width32
bit size32
boundary scanNO
maximum clock frequency66.67 MHz
External data bus width32
FormatFIXED POINT
Integrated cacheNO
JESD-30 codeS-PQFP-G100
JESD-609 codee0
length14 mm
low power modeNO
Humidity sensitivity level3
Number of DMA channels
Number of external interrupt devices6
Number of serial I/Os
Number of terminals100
On-chip data RAM width
Maximum operating temperature85 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)240
Certification statusNot Qualified
RAM (number of words)0
Maximum seat height1.6 mm
speed33 MHz
Maximum slew rate370 mA
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width14 mm
uPs/uCs/peripheral integrated circuit typeMICROPROCESSOR, RISC
Base Number Matches1
IDT79R3041
INTEGRATED RISController
FOR
LOW-COST SYSTEMS
Integrated Device Technology, Inc.
IDT79R3041
IDT79RV3041
FEATURES:
• Instruction set compatible with IDT79R3000A
and RISController Family MIPS RISC CPUs
• High level of integration minimizes system cost
— RISC CPU
— Multiply/divide unit
— Instruction Cache
— Data Cache
— Programmable bus interface
— Programmable port width support
• On-chip instruction and data caches
— 2KB of Instruction Cache
— 512B of Data Cache
• Flexible bus interface allows simple, low-cost designs
— Superset pin-compatible with RISController
— Adds programmable port width interface
(8-, 16-, and 32-bit memory sub-regions)
— Adds programmable bus interface timing support
(Extended address hold, Bus turn around time,
Read/write masks)
ClkIn
Clock
Generator
Unit
Double-frequency clock input
16.67MHz, 20MHz, 25MHz and 33MHz operation
20MIPS at 25MHz
Low cost 84-pin PLCC packaging
On-chip 4-deep write buffer eliminates memory write stalls
On-chip 4-word read buffer supports burst or simple block
reads
On-chip DMA arbiter
On-chip 24-bit timer
Boot from 8-bit, 16-bit, or 32-bit wide PROMs
Pin- and software-compatible family includes R3041, R3051,
R3052
, and R3081
Complete software support
— Optimizing compilers
— Real-time operating systems
— Monitors/debuggers
— Floating Point emulation software
— Page Description Languages
Master Pipeline Control
System Control
Coprocessor
Exception/Control
Registers
Bus Interface
Registers
PortSize
Register
Counter
Registers
Virtual Address
32
Physical Address Bus
SBrCond(3:2)
Int(5:3)
,
SInt(2:0)
Integer
CPU Core
General Registers
(32 x 32)
ALU
Shifter
Mult/Div Unit
Address Adder
PC Control
TC
32
Instruction
Cache
2kB
Data Bus
R3051 Superset
Bus Interface Unit
4-deep
Write
Buffer
Data
Unpack
Unit
Address/
Data
4-deep
Read
Buffer
Data
Pack
Unit
DMA
Ctrl
DMA
Arbiter
BIU
Control
Data
Cache
512B
Timing/ Interface
Control
Rd
/
Wr
SysClk
2905 drw 01
Ctrl
Figure 1. R3041 Block Diagram
RISController, R3041, R3051, R3052, R3081, ORION, IDT/sim, and IDT/kit are trademarks, and the IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
MARCH 1996
DSC-2905/5
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