74F968QC datasheet, PDF - EEWORLD Datasheet

74F968QC: DescriptionIC DRAM CONTROLLER, PQCC52, PLASTIC, LCC-52, Memory Controller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size572KB，13 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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74F968QC Overview

IC DRAM CONTROLLER, PQCC52, PLASTIC, LCC-52, Memory Controller

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	QCCJ, LDCC52,.8SQ
Reach Compliance Code	unknown
Address bus width	20
boundary scan	NO
External data bus width
JESD-30 code	S-PQCC-J52
JESD-609 code	e0
length	19.1262 mm
low power mode	NO
Number of blocks	4
Number of terminals	52
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC52,.8SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum slew rate	300 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	19.1262 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM
Base Number Matches	1

	74F968QC
Description	IC DRAM CONTROLLER, PQCC52, PLASTIC, LCC-52, Memory Controller
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	QCCJ, LDCC52,.8SQ
Reach Compliance Code	unknown
Address bus width	20
boundary scan	NO
JESD-30 code	S-PQCC-J52
JESD-609 code	e0
length	19.1262 mm
low power mode	NO
Number of blocks	4
Number of terminals	52
Maximum operating temperature	70 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC52,.8SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum slew rate	300 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	19.1262 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM
Base Number Matches	1

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