®
SP6128A
Ideal for 2A to 10A, Small Footprint, DC-DC Power Converters
Low Voltage, Synchronous Step Down PWM Controller
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Optimized for Single Supply, 3V - 5.5V Applications
GL 1
14 BST
High Efficiency: Greater Than 95% Possible
PV
CC
2
13 GH
V
CC
3
Discontinuous Startup for Precharged Output
12 SWN
SP6128A
PGND 4
Accurate Fixed 300kHz Frequency Operation
11 I
SET
14 pin TSSOP
GND 5
10 V
FB
Fast Transient Response
COMP 6
NC
9
Internal Soft Start Circuit
NC 7
NC
8
Accurate 0.8V Reference Allows Low Output
Voltages
Now Available in Lead Free Packaging
Resistor Programmable Output Voltage
Resistor Programmable Overcurrent Threshold
APPLICATIONS
Loss-less Current Limit with High Side R
DS(ON)
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DSP
Sensing
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Microprocessor Core
Hiccup Mode Current Limit Protection
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I/O & Logic
Dual N-Channel MOSFET Synchronous Driver
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Industrial Control
Quiescent Current: 500µA, 30µA in Shutdown
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Distributed Power
14 pin TSSOP
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Low Voltage Power
DESCRIPTION
The SP6128A is a fixed frequency, voltage mode, synchronous PWM controller designed to
work from a single 5V or 3.3V input supply, providing excellent AC and DC regulation for high
efficiency power conversion. Requiring only few external components, the SP6128A pack-
aged in an 14-pin TSSOP, is especially suited for low voltage applications where cost, small
size and high efficiency are critical. The operating frequency is internally set to 300kHz,
allowing small inductor values and minimizing PC board space. The SP6128A drives two
N-channel power MOSFETs for improved efficiency and includes an accurate 0.8V reference
for low output voltage applications.
TYPICAL APPLICATION CIRCUIT
3V to 5.5V
C5
10µF
C6
10µF
C7
10µF
D1
MBR0530
R1
5
1
2
3
GL
BST
14
13
PV
CC
SP6128A
GH
12
V
CC
SWN
4
11
I
SET
PGND
5
6
7
GND
COMP
NC
V
FB
NC
NC
10
9
8
C4
1µF
R3
8k
Q1
FDS6690A
L1
1.0µH
2.5V/10A
C1
2.2µF
D2
STPS2L25U
Q2
FDS6690A
C12
4.7nF
R4
1.7k
C8
10µF
C9
10µF
C10
10µF
C11
470µF
C3
68pF
R5
800
R2
7.87k C2 4.7n
Rev. 08/19/05
SP6128A Low Voltage, Synchronous Step Down PWM Controller
© Copyright 2005 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
V
CC,
PV
CC .........................................................................................
7V
BST .................................................................. 13.2V
BST-SWN .............................................................. 7V
SWN ............................................................ -1V to 7V
GH ............................................... -0.3V to BST +0.3V
GH-SWN ............................................................... 7V
All other pins ................................ -0.3V to V
CC
+ 0.3V
Peak Output Current < 10µs
GH,GL .................................................................. 2A
Storage Temperature ........................ -65°C to 150°C
Power Dissipation .............................................. 1.3W
Junction Temperature, T
J
................................ 125°C
Lead Temperature (Soldering, 10 sec) ............ 300°C
ESD Rating. ................................................ 2kV HBM
Thermal Resistance
θ
JC
............................. 31.7°C/W
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
ELECTRICAL CHARACTERISTICS
Unless otherwise specified: -40°C < T
A
< 85°C, 3.0V < PV
CC
= V
CC
< 5.5V, C
COMP
= 22nF, CGH = CGL = 3.3nF, V
FB
= 0.8V,
SWN = GND = 0V, typical value for design guideline only.
PARAMETER
QUIESCENT CURRENT
V
CC
Supply Current
PV
CC
Supply Current
V
CC
Supply Current(Disabled)
PV
CC
Supply Current (Disabled)
ERROR AMPLIFIER
Error Amplifier Transconductance
COMP Sink Current
COMP Source Current
COMP Output Impedance
V
FB
Input Bias Current
Error Amplifier Reference
OSCILLATOR & DELAY PATH
Internal Oscillator Frequency
Maximum Controlled Duty Cycle
Minimum Duty Cycle
Minimum GH Pulse Width
CURRENT LIMIT
I
SET
Pin Sink Current
I
SET
Current Temperature Coefficient
Current Limit Time Constant
Overcurrent Comparator
Threshold Voltage
Threshold Voltage Temperature
Coefficient
MIN
TYP MAX
UNITS
CONDITIONS
0.5
1
30
1
0.6
10
10
35
35
3
1.0
20
60
20
mA
µA
µA
µA
ms
No Switching
No Switching, GH = Low
COMP=0V
COMP=0V
65
65
130
µA
µA
MΩ
nA
V
kHz
%
V
FB
= 0.9V, COMP = 0.9V, No Faults
V
FB
= 0.7V, COMP = 2V
0.788 0.8
270
300
90
0.812
330
0
Trimmed with Error Amp in Unity Gain
Loop in control - 100% DC Possible
Comp=0.7V
PV
CC
> 4.5V, Ramp up COMP voltage
until GH starts switching
Temp = 25
°C
%
ns
150
250
10
12.5
3400
15
15
µA
ppm/°C
µs
100
125
3400
150
mV
ppm/°C
VI
SET
- V
SWN
, Temp = 25°C
Rev. 08/19/05
SP6128A Low Voltage, Synchronous Step Down PWM Controller
© Copyright 2005 Sipex Corporation
2
ELECTRICAL CHARACTERISTICS
Unless otherwise specified: -40°C < T
A
< 85°C, 3.0V < PV
CC
= V
CC
< 5.5V, C
COMP
= 22nF, CGH = CGL = 3.3nF, V
FB
= 0.8V,
SWN = GND = 0V, typical value for design guideline only.
PARAMETER
Internal Soft Start Slew Rate
COMP Discharge Current
COMP Clamp Voltage
COMP Clamp Current
Shutdown Threshold Voltage
Shutdown Input Pull-up Current
V
CC
Start Threshold
V
CC
Stop Threshold
GATE DRIVERS
GH Rise Time
GH Fall Time
GL Rise Time
GL Fall Time
GH to GL Non-Overlap Time
GL to GH Non-Overlap Time
MIN
0.1
183
0.55
10
0.29
2
2.63
2.47
TYP
0.3
0.65
30
0.34
5
2.8
2.7
60
60
60
60
MAX UNITS CONDITIONS
0.6
0.75
65
0.39
10
2.95
2.9
110
110
110
110
140
140
V/ms
µA
V
µA
V
µA
V
V
ns
ns
ns
ns
ns
ns
PV
CC
> 4.5V
PV
CC
> 4.5V
PV
CC
> 4.5V
PV
CC
> 4.5V
PV
CC
> 4.5V, measured at 2volt threshold
PV
CC
> 4.5V, measured at 2volt threshold
COMP pin, on transition from
COMP = 0.5V, Fault Initiated
V
FB
= 0.9V
COMP = 0.5V, V
FB
= 0.9V
Measured at COMP Pin
COMP = 0.2V, Measured at COMP pin
shutdown
SOFT START, SHUTDOWN, UVLO
0
0
100
100
PIN DESCRIPTION
PIN N0.
1
2
3
4
5
6
PIN NAME
GL
PV
CC
V
CC
PGND
GND
COMP
DESCRIPTION
High current driver output for the low side MOSFET switch. It is always low if GH is high.
GL swings from PGND to PV
CC
.
Positive input supply for the low side gate driver. It's recommended to tie the PV
CC
to the
V
CC
pin.
Positive input supply for the logic circuitry. Properly bypass this pin to GND with a low ESL/
ESR ceramic capacitor or RC filter.
Power ground pin.
Signal ground pin.
Output of the Error Amplifier. It is internally connected to the inverting input of the PWM
comparator. A lead-lag network is typically connected to the COMP pin to compensate the
feedback loop in order to optimize the dynamic performance of the voltage mode control
loop. Sleep mode can be invoked by pulling the COMP pin below 0.3V with an external
open-drain or open-collector transistor. An internal 5µA pull-up ensures start-up.
No connect.
Feedback Voltage Pin. It is the inverting input of the Error Amplifier and serves as the
output voltage feedback point for the Buck converter. The output voltage is sensed and
can be adjusted through an external resistor divider.
Overcurrent program pin. A resistor programs the overcurrent threshold. The overcurrent
comparator sets the fault latch and terminates gate pulses when VI
SET
> V
SWN
and the high
side MOSFET is turned on. This prevents excessive power dissipation in the external
power MOSFETs during an overload condition. An internal delay circuit prevents false
shutdowns that might otherwise occur during very short, mild overload conditions,due to
load transients.
Lower supply rail for the GH high-side gate driver. It also connects to the Current Limit
comparator. Connect this pin to the switching node at the junction between the two
external power MOSFET transistors. This pin monitors the voltage drop across the R
DS(ON)
of the high side N-channel MOSFET while it is conducting.
High current driver output for the high side MOSFET switch. It is always low if GL is high or
during a fault. GH swings from SWN to BST.
High side driver supply pin. Connect BST to the external boost diode and capacitor as
shown in the application schematic on page 1.
SP6128A Low Voltage, Synchronous Step Down PWM Controller
© Copyright 2005 Sipex Corporation
7, 8, 9
10
NC
V
FB
11
I
SET
12
SWN
13
14
GH
BST
Rev. 08/19/05
3
FUNCTIONAL DIAGRAM
1V
Reference
0.8V
-
+
-
DRIVER ENABLE
2 PV
CC
SHUTDOWN
14 BST
FAULT
0.27V/ms
SOFTSTART
+
-
GM
ERROR
AMP
350mV
5µA
+
RESET
Dominant
R
PWM
Logic
PWM COMP
-
+
13 GH
Synchronous
Driver
1 GL
V
FB
10
COMP 6
V
CC
3
UVLO
Q
S
12 SWN
4 PGND
-
2.8V ON
2.7V OFF
750mV RAMP
F = 300kHz
5 GND
+
Over Current
Reset
Dominant
S
Q
SHUTDOWN
R
FAULT
COMP
GH
15µA
I
SET
11
SWN
+
-
OPERATION
General Overview
The SP6128A is a constant frequency, voltage
mode, synchronous PWM controller designed
for low voltage, DC/DC step down converters.
It is intended to provide complete control for a
high power, high efficiency, precisely regulated
output voltage from a highly integrated 14-pin
solution.
The internal free-running oscillator accurately
sets the PWM frequency at 300kHz without
requiring any external elements and allows the
use of physically small, low value external com-
ponents without compromising performance. A
transconductance amplifier is used for the error
amplifier, which compares an attenuated sample
of the output voltage with a precision, 0.8V
reference voltage. The output of the error ampli-
fier (COMP), is compared to a 0.75V peak-to-
peak ramp waveform to provide PWM control.
The COMP pin provides access to the output of
the error amplifier and allows the use of external
components to stabilize the voltage loop.
Rev. 08/19/05
High efficiency is obtained through the use of
synchronous rectification. Synchronous regula-
tors replace the catch diode in the standard buck
converter with a low R
DS(ON)
N-channel
MOSFET switch allowing for significant ef-
ficiency improvements. The SP6128A in-
cludes two fast MOSFET drivers with inter-
nal non-overlap circuitry and drives a pair of
N-channel power transistors. The SP6128A
includes an internal 0.27V/ms soft-start cir-
cuit that provides controlled ramp up of the
output voltage, preventing overshoot and in-
rush current at power up.
Current limiting is implemented by monitoring
the voltage drop across the R
DS(ON)
of the high
side N-channel MOSFET while it is conducting,
thereby eliminating the need for an external
sense resistor. The overcurrent threshold can be
programmed by a single resistor.
SP6128A Low Voltage, Synchronous Step Down PWM Controller
© Copyright 2005 Sipex Corporation
4
OPERATION: continued
When the overcurrent threshold is exceeded, the
overcurrent comparator sets the fault latch and
terminates the output pulses. The controller
stops switching and goes through a hiccup se-
quence. This prevents excessive power dissipa-
tion in the external power MOSFETs during an
overload condition. An internal delay circuit
prevents that very short and mild overload con-
ditions, that could occur during a load transient,
activate the current limit circuit.
A low power sleep mode can be invoked in the
SP6128A by externally forcing the COMP pin
below 0.3V. Quiescent supply current in sleep
mode is typically less than 30µA. An internal
5µA pull-up current at the COMP pin brings the
SP6128A out of shutdown mode.
An internal 0.8V 1.5% reference allows out-
put voltage adjustment for low voltage appli-
cations.
The SP6128A also includes an accurate under-
voltage lockout that shuts down the controller
when the input voltage falls below 2.7V. Output
overvoltage protection is achieved by turning
off the high side switch and turning on the low
side N-channel MOSFET 100% of the time.
Enable
UVLO
Assuming that there is not shutdown condition
present, then the voltage on the V
CC
pin deter-
mines operation of the SP6128A. As V
CC
rises,
the UVLO block monitors V
CC
and keeps the
high side and low side MOSFETS off and the
internal SS voltage low until V
CC
reaches 2.8V.
If no faults are present, the SP6128A will ini-
tiate a soft start when V
CC
exceeds 2.8 V.
Hysteresis (about 100mV) in the UVLO com-
parator provides noise immunity at start-up.
Soft Start
Soft start is required on step-down controllers to
prevent excess inrush current through the power
train during start-up. Typically this is managed
by sourcing a controlled current into a timing
capacitor and then using the voltage across this
capacitor to slowly ramp up either the error amp
reference or the error amp output (COMP). The
control loop creates narrow width driver pulses
while the output voltage is low and allows these
pulses to increase to their steady-state duty
cycle as the output voltage increases to its regu-
lated value. As a result of controlling the induc-
tor volt*second product during startup, inrush
current is also controlled.
In the SP6128A the duration of the soft-start is
controlled by an internal timing circuit that
provides a 0.3V/mS slew-rate, which is used
during startup and overcurrent to set the hiccup
time. The SP6128A implements soft-start by
ramping up the error amplifier reference voltage
providing a controlled slew-rate of the output
voltage, thereby preventing overshoot and in-
rush current at power up.
The presence of the output capacitor creates extra
current draw during startup. Simply stated, dV
OUT
/
dt requires an average sustained current in the
output capacitor and this current must be consid-
ered while calculating peak inrush current and
over current thresholds. An approximate expres-
sion to determine the excess inrush current due to
the dV
OUT
/dt of the output capacitor C
OUT
is:
V
OUT
Iinrush = C
OUT
x
(0.27 V/ms)
x
0.8V
Low quiescent mode or “Sleep Mode” is initi-
ated by pulling the COMP pin below 0.3V with
an external open-drain or open-collector tran-
sistor. Supply current is reduced to 30µA (typi-
cal) in shutdown. On power-up, assuming that
V
CC
has exceeded the UVLO start threshold
(2.8V), an internal 5µA pull-up current at the
COMP pin brings the SP6128A out of shutdown
mode and ensures start-up. During normal oper-
ating conditions and in absence of a fault, an
internal clamp prevents the COMP pin from
swinging below 0.6V. This guarantees that dur-
ing mild transient conditions, due either to line
or load variations, the SP6128A does not enter
shutdown unless it is externally activated.
During Sleep Mode, the high side and low side
MOSFETS are turned off and the internal soft
start voltage is held low.
Rev. 08/19/05
SP6128A Low Voltage, Synchronous Step Down PWM Controller
© Copyright 2005 Sipex Corporation
5
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