8523CGIT datasheet, PDF - EEWORLD Datasheet

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8523CGIT: DescriptionClock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20; Categorylogic logic; File Size2MB，18 Pages; ManufacturerIDT (Integrated Device Technology)

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8523CGIT Overview

Clock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20

8523CGIT Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP20,.25
Contacts	20
Reach Compliance Code	not_compliant
ECCN code	EAR99
series	8523
Input adjustment	DIFFERENTIAL MUX
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
length	6.5 mm
Logic integrated circuit type	CLOCK DRIVER
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	20
Actual output times	4
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP20,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	225
power supply	3.3 V
Prop。Delay @ Nom-Sup	1.6 ns
propagation delay (tpd)	1.6 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.05 ns
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	4.4 mm
minfmax	650 MHz
Base Number Matches	1

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Low Skew, 1-to-4, Differential-to-HSTL

Fantout Buffer

ICS8523I

DATA SHEET

General Description

The ICS8523I is a low skew, high performance 1-to-4

Differential-to-HSTL Fanout Buffer. The ICS8523I has two selectable

clock inputs. The CLK, nCLK pair can accept most standard

differential input levels. The PCLK, nPCLK pair can accept LVPECL,

CML, or SSTL input levels. The clock enable is internally

synchronized to eliminate runt pulses on the outputs during

asynchronous assertion/deassertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make the

ICS8523I ideal for those applications demanding well defined

performance and repeatability.

Features

•

Four differential HSTL compatible outputs

Selectable differential CLK, nCLK or LVPECL clock inputs

CLK, nCLK pair can accept the following differential input levels:

LVPECL, LVDS, HSTL, HCSL, SSTL

PCLK, nPCLK pair can accept the following differential input

levels: LVPECL, CML, SSTL

Maximum output frequency: 650MHz

Translates any single-ended input signal to HSTL levels with

resistor bias on nCLK input

Additive phase jitter, RMS: 0.082ps (typical), 100MHz f

OUT

Additive phase jitter, RMS: 0.190ps (typical), 120MHz f

OUT

Output skew: 50ps (maximum)

Part-to-part skew: 250ps (maximum)

Propagation delay: 1.6ns (maximum)

3.3V core, 1.8V output operating supply

-40°C to 85°C ambient operating temperature

Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

Block Diagram

CLK_EN

Pullup

CLK

Pulldown

nCLK

Pullup

PCLK

Pulldown

nPCLK

Pullup

CLK_SEL

Pulldown

nQ1

nQ2

nQ3

nQ0

Pin Assignment

GND

CLK_EN

CLK_SEL

CLK

nCLK

PCLK

nPCLK

nQ0

DDO

nQ1

nQ2

DDO

nQ3

ICS8523I

20-Lead TSSOP

6.5mm x 4.4mm x 0.925mm package body

G Package

Top View

ICS8523CGI REVISION E JANUARY 21, 2011

8523CGIT Related Products

	8523CGIT	8523CGI
Description	Clock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20	Clock Driver, 8523 Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20
Is it lead-free?	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible
Parts packaging code	TSSOP	TSSOP
package instruction	TSSOP, TSSOP20,.25	TSSOP, TSSOP20,.25
Contacts	20	20
Reach Compliance Code	not_compliant	not_compliant
ECCN code	EAR99	EAR99
series	8523	8523
Input adjustment	DIFFERENTIAL MUX	DIFFERENTIAL MUX
JESD-30 code	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e0	e0
length	6.5 mm	6.5 mm
Logic integrated circuit type	CLOCK DRIVER	CLOCK DRIVER
Humidity sensitivity level	1	1
Number of functions	1	1
Number of terminals	20	20
Actual output times	4	4
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP
Encapsulate equivalent code	TSSOP20,.25	TSSOP20,.25
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	225	225
power supply	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	1.6 ns	1.6 ns
propagation delay (tpd)	1.6 ns	1.6 ns
Certification status	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.05 ns	0.05 ns
Maximum seat height	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	30	30
width	4.4 mm	4.4 mm
minfmax	650 MHz	650 MHz
Base Number Matches	1	1

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