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ICS87952AYI-147LF

Description
PLL Based Clock Driver, 87952 Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
Categorylogic    logic   
File Size135KB,13 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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ICS87952AYI-147LF Overview

PLL Based Clock Driver, 87952 Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32

ICS87952AYI-147LF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instruction7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
Contacts32
Reach Compliance Codeunknown
ECCN codeEAR99
series87952
Input adjustmentSTANDARD
JESD-30 codeS-PQFP-G32
JESD-609 codee3
length7 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
MaximumI(ol)0.02 A
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals32
Actual output times11
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP32,.35SQ,32
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup0.2 ns
propagation delay (tpd)0.2 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.15 ns
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width7 mm
minfmax180 MHz
Base Number Matches1
Low Skew, 1-to-11 LVCMOS/LVTTL
Clock Multiplier/Zero Delay Buffer
G
ENERAL
D
ESCRIPTION
The ICS87952I-147 is a low voltage, low skew
LVCMOS/LVTTL Clock Generator and a member of
HiPerClockS™
the HiPerClockS™ family of High Performance Clock
Solutions from IDT. With output frequencies up to
180MHz, the ICS87952I-147 is targeted for high
performance clock applications. Along with a fully integrated PLL,
the ICS87952I-147 contains frequency configurable outputs and
an external feedback input for regenerating clocks with “zero de-
lay”.
ICS87952I-147
DATA SHEET
F
EATURES
Fully integrated PLL
Eleven LVCMOS / LVTTL outputs, 7Ω typical output impedance
LVCMOS / LVTTL REF_CLK input
Output frequency range up to 180MHz at V
DD
= 3.3V ± 5%
VCO range: 240MHz - 480MHz
External feedback for “zero delay” clock regeneration
Cycle-to-cycle jitter: 100ps (maximum)
3.3V supply voltage
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
For test and system debug purposes, the nPLL_EN input allows
the PLL to be bypassed. When HIGH, the MR/nOE input resets
the internal dividers and forces the outputs to the high impedance
state.
The low impedance LVCMOS/LVTTL outputs of the ICS87952I-
147 are designed to drive terminated transmission lines. The ef-
fective fanout of each output can be doubled by utilizing the abil-
ity of each output to drive two series terminated transmission lines.
B
LOCK
D
IAGRAM
nPLL_EN
P
IN
A
SSIGNMENT
GNDO
GNDO
V
DDO
V
DDO
QB1
QB0
QA4
QA3
REF_CLK
PHASE
DETECTOR
VCO
240 - 480MHz
1
0
÷2
0
÷4/÷6
1
24 23 22 21 20 19 18 17
QA0
QA1
QA2
V
DDO
QB2
QB3
GNDO
GNDO
QC0
QC1
÷4/÷2
25
26
27
28
29
30
31
32
1
VCO_SEL
16
15
14
V
DDO
QA2
QA1
GNDO
QA0
V
DD
V
DDA
nPLL_EN
FB_IN
LFP
QA3
QA4
ICS87952I-147
13
12
11
10
9
VCO_SEL
F_SELA
QB0
QB1
V
DDO
2
F_SELC
3
F_SELB
4
F_SELA
MR/nOE
5
REF_CLK
6
GNDI
7
FB_IN
8
F_SELB
QB2
QB3
÷2/÷4
QC0
QC1
F_SELC
MR/nOE
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y package
Top View
ICS87952AYI-147 REVISION C AUGUST 4, 2009
1
©2009
Integrated Device Technology, Inc.

ICS87952AYI-147LF Related Products

ICS87952AYI-147LF ICS87952AYI-147LFT
Description PLL Based Clock Driver, 87952 Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 PLL Based Clock Driver, 87952 Series, 11 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFP QFP
package instruction 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026BBA, LQFP-32
Contacts 32 32
Reach Compliance Code unknown unknown
series 87952 87952
Input adjustment STANDARD STANDARD
JESD-30 code S-PQFP-G32 S-PQFP-G32
length 7 mm 7 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER PLL BASED CLOCK DRIVER
Number of functions 1 1
Number of terminals 32 32
Actual output times 11 11
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Package shape SQUARE SQUARE
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
propagation delay (tpd) 0.2 ns 0.2 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.15 ns 0.15 ns
Maximum seat height 1.6 mm 1.6 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location QUAD QUAD
width 7 mm 7 mm
minfmax 180 MHz 180 MHz
Base Number Matches 1 1
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