3531-001CD10 datasheet, PDF - EEWORLD Datasheet

3531-001CD10: DescriptionToggle Switch, SPST, Latched, 15A, 28VDC, Screw Terminal, Locking Lever Actuator, Panel Mount-threaded; CategoryMechanical and electronic products switch; File Size131KB，7 Pages; ManufacturerAPEM; Environmental Compliance

Download Datasheet Parametric View All

3531-001CD10 Overview

Toggle Switch, SPST, Latched, 15A, 28VDC, Screw Terminal, Locking Lever Actuator, Panel Mount-threaded

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	APEM
Reach Compliance Code	unknown
ECCN code	EAR99
Actuator type	LOCKING LEVER
body width	15 mm
body height	31.4 mm
Body length or diameter	32 mm
Contact (AC) maximum rated R load	20A@125VAC
Maximum contact current (AC)	20 A
Maximum contact current (DC)	15 A
Contact (DC) maximum rated R load	15A@28VDC
Maximum contact voltage (AC)	125 V
Maximum contact voltage (DC)	28 V
Electrical life	6000 Cycle(s)
Installation features	PANEL MOUNT-THREADED
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
method of packing	BULK
seal	ENVIRONMENTALLY SEALED
surface mount	NO
Switch action	LATCHED
switch function	SPST
Switch type	TOGGLE SWITCH
Termination type	SCREW
Base Number Matches	1

3500 SERIES

HIGH PERFORMANCE TOGGLE SWITCHES

ENVIRONMENTALLY SEALED

Distinctive features

❑

Completely sealed switches withstanding 0,1 bar pressure

•

Front face and cover-to-case silicone seal

•

Moulded-in terminal inserts

❑

Approved to European standards CECC 96000

CECC 96201-004

❑

Three types of terminals

❑

Many lever styles available

A P E M

I-13

Share: Face recognition design paper based on DSP: [color=#252525]Design paper of face recognition based on DSP[/color] [color=#252525] [/color] [color=#252525][/color] [color=#252525][/color] [color=#252525] [/color]...; Jacktang Microcontroller MCU

【Design Tools】Xilinx's new FPGA design tool makes FPGA reprogrammable: Xilinx has launched a new version of real-time debugging and verification software for FPGA designs. The company's ChipScope Pro 6.2i makes FPGA reprogrammable, and debugging of logic and embedded sys...; hangsky FPGA/CPLD

Domestic designhouse list: [i=s]This post was last edited by jameswangsynnex on 2015-3-3 20:00[/i] Please continue to add and I will compile a list. 1. Domestic TV Design Houses: In Shanghai, there are Panorama, Chip, Inno, pix...; maker Mobile and portable

LED magic stick design: [i=s]This post was last edited by paulhyde on 2014-9-15 09:06[/i] [b][font=Times New Roman]I found a design task on the Internet. Let's discuss it together! [/font][/b] [b] [/b][b][font=宋体]1. Design T...; submars Electronics Design Contest

~ccs always prompts debug assertion failed: ~ccs always prompts debug assertion failed. How do you solve it?...; huyu0427 DSP and ARM Processors

Why do op amps generally amplify inversely?: [size=4]The major difference between the inverting input method and the non-inverting input method is: [/size] [size=4] In the inverting input method, since a balanced resistor is connected to the gro...; Jacktang Analogue and Mixed Signal

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components