530UA135M000BGR datasheet, PDF

Datasheet> All Categories > oscillator> 530UA135M000BGR

530UA135M000BGR: DescriptionCMOS/TTL Output Clock Oscillator, 135MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size268KB，15 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530UA135M000BGR Overview

CMOS/TTL Output Clock Oscillator, 135MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530UA135M000BGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	135 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	177.8mm x 127.0mm x 41.91mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.0 7/06

Si530/531

Recommended Resources

Detection status circuit

Practical sparrow expulsion device circuit

555 simple washing machine timer circuit

Wireless remote control plus/minus resistance network circuit

20～20000Hz oscillation circuit

Internal structure of LM567

New RF test solution ensures quality of automotive wireless modules: The use of modules and devices with a wide variety of RF interfaces is growing in all kinds of vehicles. Because these modules must meet stringent reliability requirements, reproducible measurement re...; frozenviolet Automotive Electronics

Laser rangefinder: I used a laser rangefinder to obtain some data. How can I use software to image it? Please help....; zhlxyj Embedded System

Does anyone have information about the handheld terminal of the octa-axis aerial photography drone? Can you share it? Thank you very much...: Does anyone have information about the handheld terminal of the octa-axis aerial photography drone? Can you share it? Thank you very much......; missuu Integrated technical exchanges

QUARTUS2 compiled error: 用quartus 2编译一下程序：LIBRARY ieee;USE ieee.std_logic_1164.ALL;ENTITY seg7dec IS PORT(bcdin : IN std_logic_vector(3 DOWNTO 0);segout : OUT std_logic_vector(6 DOWNTO 0));END seg7dec;ARCHITECTURE ver3 OF seg...; eeleader-mcu FPGA/CPLD

Definition of timeout: I am learning UART communication recently. The book I am using is "ARM7 in Simple Terms". In the book, only the RDA interrupt example is given in the interrupt communication. I want to write a program...; yj3333 Embedded System

About AD interruption problem: If ADIE is on, ADON is on, GIE is on, ADCON0 is set to 41, ADCON is set to 0E. After GO is set to 1, will ADIF be set soon? Will an interrupt be triggered? If the interrupt does nothing and clears ADI...; windirection Microchip MCU

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components