530FC689M000DGR datasheet, PDF

Datasheet> All Categories > oscillator> 530FC689M000DGR

530FC689M000DGR: DescriptionLVDS Output Clock Oscillator, 689MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530FC689M000DGR Overview

LVDS Output Clock Oscillator, 689MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530FC689M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	7%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	689 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

What is PCB dry film?

Internal structure of remote operation inverter control circuit and remote operation panel

Voice controlled LED flash circuit

Miniaturized isolation amplifier circuit diagram

555 water tower water level wired telemetry remote control device circuit

845ddr computer motherboard circuit diagram_23

How to filter out 50HZ power frequency interference introduced by active filtering: I need to amplify a sine wave signal of about 1mV to collect its frequency. I use AD620+active bandpass filter+OP07 amplification for signal acquisition. At present, after the second-level active filt...; 天天1 Analog electronics

Is it the inverter or the integrator circuit?: As shown The input Uin of the op amp is obtained from the -380VDC bus through resistor voltage division to obtain -3.5VDC Is the op amp in the figure a simple inverting 1:1 amplifier circuit, or is it...; shaorc Analog electronics

How to configure uclinux to automatically obtain an ip after arm is powered on?: How to configure uclinux to let arm automatically get ip after power on? My development board is S3C44B0. I heard that uclinux supports dhcp. 1. What should I choose when compiling uclinux 2.4 kernel ...; wawj1819 Linux and Android

Can first-tier devices do the job?: Previously, the sensor head was made by Honeywell combined with first-line devices. The SHT21 may be smaller in size. The I2C interface direct cable transmission requires signal preprocessing. Can fir...; bjwl_6338 DIY/Open Source Hardware

linux-2.6.34 kernel porting documentation [simple operation]: I just transplanted the kernel image file, put it on the development board and ran it for a while, and the system is running!!! Pictures speak louder than words...See the attached documentation for th...; 37°男人 Embedded System

Introduction to the training for the 2013 Electronic Design Competition: [i=s] This post was last edited by paulhyde on 2014-9-15 03:11 [/i] Nanhua University Huang Zhiwei prepares for the 2013 Electronic Design Competition - Introduction to some information on training...; 黄智伟 Electronics Design Contest

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components