Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
IN
= +19V, T
A
= -40°C to +85°C, unless otherwise noted, C
VDD
= 100nF. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
IN
Input Voltage Range
Overvoltage Adjustable Trip
Range
Overvoltage Comp Reference
OVS Input Leakage Current
Overvoltage Trip Hysteresis
Undervoltage Adjustable Trip
Range
Undervoltage Comp Reference
UVS Input Leakage Current
Undervoltage Trip Hysteresis
Internal Undervoltage Trip Level
Internal Undervoltage Trip
Hysteresis
Power-On Trip Level
Power-On Trip Hysteresis
IN Supply Current
V
DD
V
DD
Voltage Range
V
DD
Undervoltage Lockout
V
DD
Undervoltage Lockout
Hysteresis
V
DD
Supply Current
GATE_
GATE1 Open-Drain MOS R
ON
Resistance
GATE2 Open-Drain MOS R
ON
Resistance
R
ON
R
ON
V
CB
= 0V, V
IN
= 19V, V
OVS
< OV
REF
and
V
UVS
> UV
REF
, I
GATE_
= 0.5mA (MAX4959)
V
CB
= 3V, I
GATE_
= 0.5mA
1
1
kΩ
kΩ
V
DD
V
DDUVLO
V
DDUVLOHYS
I
VDD
V
DD
= +5V, V
IN
= 0V
V
DD
falling edge
2.7
1.55
50
10
5.5
2.40
V
V
mV
µA
V
IN
OVLO
OV
REF
OVI
LKG
OV
HYS
UVLO
UV
REF
UVI
LKG
UV
HYS
INTUV
REF
INTUV
HYS
POTL
POTL
HYS
I
IN
V
IN
= +19V, V
OVS
< OV
REF
and
V
UVS
> UV
REF
V
DD
> +3V, IN rising edge
0.5
V
IN
falling edge
4.1
(Note 2)
V
IN
falling edge
5
1.18
-100
1
4.4
1
0.75
10
100
300
1
4.7
1.228
(Note 2)
V
IN
rising edge
4
6
1.18
-100
1
28
1.276
+100
1.228
28
28
1.276
+100
V
V
V
nA
%
V
V
nA
%
V
%
V
%
µA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
Maxim Integrated
MAX4959/MAX4960
High-Voltage OVP with Battery Switchover
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +19V, T
A
= -40°C to +85°C, unless otherwise noted, C
VDD
= 100nF. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER
GATE1 Leakage Current
GATE2 Leakage Current
CB
Logic-Level High
Logic-Level Low
CB Pulldown Resistor
TIMING
Debounce Time
GATE1 Assertion Delay from
CB Pin
GATE2 Assertion Delay from
CB Pin
Blanking Time
MAX4960
SOURCE1/GATE1 Resistance
GATE1/Ground Resistance
R
SG
R
GG
(MAX4960)
GATE1 Asserted (MAX4960)
140
140
200
200
260
260
kΩ
kΩ
t
DEB
t1
GATE
t2
GATE
t
BLANK
V
OVP
> V
IN
> V
UVP
for greater than t
DEB
for
GATE1 to go low
CB = +3V to 0
rise time = fall time = 5ns (Note 3)
CB = 0 to +3V
rise time = fall time = 5ns (Note 3)
10
10
25
50
50
25
40
40
ms
ns
ns
ms
V
IH
V
IL
R
CBPD
1
2
1.5
0.4
3
V
V
MΩ
SYMBOL
G1I
LKG
G2I
LKG
V
CB
= 0V
CONDITIONS
V
OVS
> OV
REF
, V
UVS
< UV
REF
, or V
CB
= +5V
MIN
-1
-1
TYP
MAX
+1
+1
UNITS
µA
µA
Note 1:
All devices are production tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2:
Do not exceed absolute maximum rating; the ratio between the externally set OVLO and UVLO threshold must not exceed 4,
[OVLO/UVLO]
MAX
≤
4.
Note 3:
Assertion delay starts from switching of CB pin to reaching of 80% of GATE1/GATE2 transition. This delay is measured without
external capacitive load.
Typical Operating Characteristics
(V
OVLO
= 22.2V and V
UVLO
= 10.1V, R1 = 887kΩ, R2 = 66.5kΩ, R3 = 54.9kΩ, all resistors 1%, OV
REF
= UV
REF
= 1.228V.)
UNDERVOLTAGE RESPONSE
(WITHIN BLANKING TIME)
(R
PULLUP
= 1kΩ)
MAX4959/60 toc02
POWER-UP RESPONSE
(R
PULLUP
= 1kΩ)
MAX4959/60 toc01
OVERVOLTAGE RESPONSE
(R
PULLUP
= 5kΩ)
30
V
IN
25
20
15
10
5
0
V
GATE1
V
DD
16
14
12
VOLTAGE (V)
10
8
6
4
2
0
-150
-100
-50
0
50
TIME (μs)
100
150
0
V
IN
10
8
VOLTAGE (V)
6
4
2
0
-2
-150
-100
V
IN
V
GATE1
DRAIN OF P1
V
DD
VOLTAGE (V)
V
GATE1
-50
0
TIME (μs)
50
100
150
10
20
30
40
50
60
70
TIME (μs)
Maxim Integrated
MAX4959/60 toc03
12
3
MAX4959/MAX4960
High-Voltage OVP with Battery Switchover
Typical Operating Characteristics (continued)
(V
OVLO
= 22.2V and V
UVLO
= 10.1V, R1 = 887kΩ, R2 = 66.5kΩ, R3 = 54.9kΩ, all resistors 1%, OV
REF
= UV
REF
= 1.228V.)
BATTERY SWITCHOVER WITH ADAPTER-
PLUGGED RESPONSE
(V
IN
= 19V, V
GATE2-PULLUP
= 4.2V, R
PULLUP
= 5kΩ)
MAX4959/60 toc05
LOW-POWER ADAPTER RESPONSE
(V
OVLO
= 22.3V, V
UVLO
= 10.1V, pFET = IRF7726)
MAX4959/60 toc04
OVERVOLTAGE AND UNDERVOLTAGE TRIP
DIFFERENCE vs. TEMPERATURE
(R
PULLUP
= 1kΩ)
4
3
2
VOLTAGE (V)
UV TRIP DIFF
MAX4959/60 toc06
13
11
9
VOLTAGE (V)
25
20
15
10
5
V
GATE1
V
GATE2
CB
5
VOLTAGE (V)
V
IN
7
5
3
1
-1
0
.05
0.1
0.15
LOAD BECOMES
PRESENT
V
GATE1
1
0
-1
-2
-3
-4
OV TRIP DIFF
DRAIN OF P1
0
-5
0.2
0.25
0.3
TIME (s)
-5
-150
-100
-50
0
50
TIME (μs)
100
150
-50
-30
-10
10
30
50
70
90
TEMPERATURE (°C)
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX4959/60 toc07
LOGIC-INPUT THRESHOLD vs. TEMPERATURE
1.8
1.6
LOGIC THRESHOLD (V)
1.4
1.2
1
0.8
0.6
0.4
0.2
0
3.5
-50
-30
-10
10
30
50
70
90
V
TH-LO
V
TH-HI
MAX4959/60 toc08
V
DD
SUPPLY CURRENT vs. TEMPERATURE
MAX4959/60 toc09
2
5
200
160
I
SUPP
(μA)
120
80
40
0
-40
0
5
10
15
V
IN
(V)
20
25
V
DD
SUPPLY CURRENT (μA)
4.5
4
-50
-30
-10
10
30
50
70
90
110
TEMPERATURE (°C)
TEMPERATURE (°C)
VOLTAGE RANGE vs. INPUT VOLTAGE RANGE
MAX4959/60 toc10
6
5
4
V
DD
(V)
3
2
1
0
0
5
10
15
V
IN
(V)
20
25
4
Maxim Integrated
MAX4959/MAX4960
High-Voltage OVP with Battery Switchover
Pin Description
PIN
MAX4959
1
2, 9
—
3
MAX4960
1
9
2
3
NAME
FUNCTION
pFET Gate Drive Output Open Drain. GATE1 is actively driven low, except during fault
(OVP or UVP) condition (the external pFET is turned off). When V
UVLO
< V
IN
< V
OVLO
,
GATE1 is driven low (the external pFET P1 is turned on).
No Connection. Not internally connected. (Connect to ground or leave unconnected.)
pFET Source Output. An internal resistor is connected between SOURCE1 and GATE1.
Voltage Input. IN is both the power-supply input and the overvoltage/undervoltage
sense input. Bypass IN to GND with a 1µF ceramic capacitor to get a ±15kV protected
input. A minimum 0.1µF ceramic capacitor is required for proper operation.
Undervoltage Threshold Set Input. Connect UVS to an external resistive divider from IN to
GND to set the undervoltage lockout threshold. (See
Typical Operating Circuits.)
Overvoltage Threshold Set Input. Connect OVS to an external resistive divider from
IN to GND to set the overvoltage lockout threshold. (See
Typical Operating Circuits.)
Internal Power-Supply Output. Bypass V
DD
to GND with a 0.1µF minimum capacitor.
V
DD
powers the internal power-on reset circuits. (See the
V
DD
Capacitor Selection
section.)
Battery Switchover Control Input. When CB is high, GATE1 is high (P1 is off), and GATE2
is low (P2 is on). When CB is low, GATE1 is controlled by internal logic and GATE2 is
high (P2 is off). GATE1 is controlled by CB only if V
UVLO
< V
IN
< V
OVLO
.
Ground
pFET Gate Drive Output, Open Drain. When CB is high, GATE2 is low (P2 is on).
When CB is low, GATE2 is high impedance (P2 is off).
GATE1
N.C.
SOURCE1
IN
4
5
6
4
5
6
UVS
OVS
V
DD
7
8
10
7
8
10
CB
GND
GATE2
Detailed Description
The MAX4959/MAX4960 provide up to +28V overvoltage
protection for low-voltage systems. When the input volt-
age exceeds the overvoltage trip level, the MAX4959/
MAX4960 turn off an external pFET to prevent damage
to the protected components.
The MAX4959/MAX4960 feature a control bit (CB) pin
that controls an external battery-switchover function that
switches in the battery when the adapter is unconnect-
ed. The host system detects when the battery switchover
must take place and pulls CB high to turn on P2. The
load current is not interrupted during battery switchover
as the body diode of P2 conducts until the CB line is dri-
ven high (see the
MAX4959 Typical Operating Circuit 1,
Figure 4).
An additional safety feature latches off pFET P1 when a
low-power adapter is plugged in. This protects the sys-
tem from seeing repeated adapter insertions and
removals when an incorrect low-power adapter is
plugged in that cannot provide sufficient current.
Undervoltage Lockout (UVLO)
The MAX4959/MAX4960 have an adjustable undervolt-
age lockout threshold ranging from +5V to +28V. When
V
IN
is less than the V
UVLO
, the device waits for a blank-
ing time, t
BLANK
, to see if the fault still exists. If the fault
does not exist at the end of t
BLANK
, P1 remains on. If
V
IN
is less than V
UVLO
for longer than the blanking
time, the device turns P1 off and P1 does not turn on
again until V
IN
< 0.75V. See Figure 1.
Overvoltage Lockout (OVLO)
The MAX4959/MAX4960 have an adjustable overvolt-
age lockout threshold ranging from +6V to +28V. When
V
IN
is greater than the V
OVLO
, the device turns P1 off
immediately. When V
IN
drops below V
OVLO,
P1 turns on
again after the debounce time has elapsed.
Device Operation
High-Voltage Adapter (V
IN
> V
OVLO
)
If an adapter with a voltage higher than V
OVLO
is
plugged in, the MAX4959/MAX4960 is in an OVP condi-
tion, so P1 is kept off or immediately turned off. There is
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