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5962-9690002H9A

Description
Memory Circuit, 128KX16, CMOS, CDSO68,
Categorystorage   
File Size222KB,29 Pages
ManufacturerWhite Microelectronics
Download Datasheet Parametric View All

5962-9690002H9A Overview

Memory Circuit, 128KX16, CMOS, CDSO68,

5962-9690002H9A Parametric

Parameter NameAttribute value
MakerWhite Microelectronics
Reach Compliance Codeunknown
Other featuresALSO CONFIGURABLE AS 128K X 16-BIT FLASH EPROM, 70 ACCESS TIME
JESD-30 codeS-CDSO-G68
JESD-609 codee0
length23.875 mm
memory density2097152 bit
Memory IC TypeMEMORY CIRCUIT
memory width16
Number of functions1
Number of terminals68
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize128KX16
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeSOP
Package shapeSQUARE
Package formSMALL OUTLINE
Certification statusNot Qualified
Maximum seat height3.56 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width23.88 mm
Base Number Matches1
REVISIONS
LTR
A
B
C
D
DESCRIPTION
Changes to V
OLS
and V
OHS
tests for device type 02.
Table I; Changed I
CC1
max limit from 250 mA to 310 mA. -sld
Table I; Changed the SRAM supply current (I
CC1
) max limit from 310
mA to 360 mA. -sld
Added case outline 9. Table I; changed the V
OL
test condition I
OL
from 12.0 mA to 8.0 mA . Added note to paragraph 1.2.2 and table I
regarding the 4 transistor design. -sld
Added case outline Y. Updated drawing to reflect current
requirements of MIL-PRF-38534. -sld
Added case outline B. Added note to paragraph 1.2.4. -sld
DATE (YR-MO-DA)
97-09-16
98-06-26
99-08-23
00-09-20
APPROVED
K. A. Cottongim
K. A. Cottongim
Raymond Monnin
Raymond Monnin
E
F
03-03-14
03-11-10
Raymond Monnin
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
F
15
F
16
F
17
F
18
REV
SHEET
PREPARED BY
Gary Zahn
CHECKED BY
Michael C. Jones
F
19
F
20
F
21
F
1
F
22
F
2
F
23
F
3
F
24
F
4
F
25
F
5
F
26
F
6
F
27
F
7
F
28
F
8
F
9
F
10
F
11
F
12
F
13
F
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DEFENSE SUPPLY CENTER COLUMBUS
P. O. BOX 3990
COLUMBUS, OHIO 43216-5000
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, HYBRID, MEMORY, DUAL, DIGITAL,
SINGLE 128K x 16 BIT STATIC RANDOM ACCESS
MEMORY, WITH SEPARATE DATA BUS AND SINGLE, 128K
x 16-BIT FLASH ERASABLE/PROGRAMMABLE READ ONLY
MEMORY WITH SEPARATE DATA BUS
DRAWING APPROVAL DATE
97-01-27
AMSC N/A
REVISION LEVEL
F
SIZE
A
SHEET
CAGE CODE
67268
1 OF
28
5962-96900
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E014-04
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