5P40040DVGI datasheet, PDF - EEWORLD Datasheet

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5P40040DVGI: DescriptionClock Generator, 200MHz, CMOS, PDSO8, 3 MM, GREEN, MSOP-8; CategoryMicrocontrollers and processors The clock generator; File Size250KB，12 Pages; ManufacturerIDT (Integrated Device Technology)

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5P40040DVGI Overview

Clock Generator, 200MHz, CMOS, PDSO8, 3 MM, GREEN, MSOP-8

5P40040DVGI Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	MSOP
package instruction	TSSOP,
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	S-PDSO-G8
length	3 mm
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	SQUARE
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Master clock/crystal nominal frequency	31.25 MHz
Certification status	Not Qualified
Maximum seat height	1.1 mm
Maximum supply voltage	1.89 V
Minimum supply voltage	1.425 V
Nominal supply voltage	1.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
width	3 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

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PRELIMINARY DATASHEET

PLL CLOCK MULTIPLIER

Description

The IDT5P40040 is the most cost effective way to generate

a high-quality, high-frequency clock output from a lower

frequency crystal or clock input. Using Phase-Locked Loop

(PLL) techniques, the device uses a standard fundamental

mode, inexpensive crystal or clock input to produce output

clocks up to 200 MHz.

Stored in the chip’s ROM is the ability to generate nine

different multiplication factors, allowing one chip to output

many common frequencies (see table on page 2).

The device also has an output enable pin which tri-states

the clock output when the OE pin is taken low.

This product is intended for clock generation. It has low

output jitter (variation in the output period), but input to

output skew and jitter are not defined or guaranteed.

IDT5P40040

Features

•

Packaged as 8-pin SOIC, MSOP, or DFN

RoHS 6 (green and lead free) compliant packaging

Input crystal or clock frequency of 6.25 - 31.25 MHz

Output clock frequencies up to 200 MHz

Extremely low jitter of 25 ps (one sigma)

Duty cycle of 45/55 up to 200 MHz

Nine selectable frequencies

Operating voltage of 1.5 V to 1.8 V

Tri-state output for board level testing

Ideal for oscillator replacement

Advanced, low-power CMOS process

Industrial Temperature Range: -40 to +85° C

Block Diagram

VDD

S1:0

X1/ICLK

Crystal or

Clock input

Crystal

Oscillator

PLL Clock

Multiplier

Circuitry

and ROM

CLK

Optional crystal capacitors

GND

IDT™

PLL CLOCK MULTIPLIER

IDT5P40040

REV D 031908

5P40040DVGI Related Products

	5P40040DVGI	5P40040NBGI8	5P40040DCGI8	5P40040NBGI	5P40040DVGI8	5P40040DCGI
Description	Clock Generator, 200MHz, CMOS, PDSO8, 3 MM, GREEN, MSOP-8	Clock Generator, 200MHz, CMOS, PDSO8, 2 X 2 MM, 0.50 MM PITCH, GREEN, DFN-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, GREEN, SOIC-8	Clock Generator, 200MHz, CMOS, PDSO8, 2 X 2 MM, 0.50 MM PITCH, GREEN, DFN-8	Clock Generator, 200MHz, CMOS, PDSO8, 3 MM, GREEN, MSOP-8	Clock Generator, 200MHz, CMOS, PDSO8, 0.150 INCH, GREEN, SOIC-8
Parts packaging code	MSOP	DFN	SOIC	DFN	MSOP	SOIC
package instruction	TSSOP,	HVSON,	0.150 INCH, GREEN, SOIC-8	HVSON,	TSSOP,	0.150 INCH, GREEN, SOIC-8
Contacts	8	8	8	8	8	8
Reach Compliance Code	compliant	compliant	unknown	compliant	compliant	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
JESD-30 code	S-PDSO-G8	S-PDSO-N8	R-PDSO-G8	S-PDSO-N8	S-PDSO-G8	R-PDSO-G8
length	3 mm	2 mm	4.9 mm	2 mm	3 mm	4.9 mm
Number of terminals	8	8	8	8	8	8
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Maximum output clock frequency	200 MHz	200 MHz	200 MHz	200 MHz	200 MHz	200 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	HVSON	SOP	HVSON	TSSOP	SOP
Package shape	SQUARE	SQUARE	RECTANGULAR	SQUARE	SQUARE	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE
Master clock/crystal nominal frequency	31.25 MHz	31.25 MHz	31.25 MHz	31.25 MHz	31.25 MHz	31.25 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.1 mm	1 mm	1.75 mm	1 mm	1.1 mm	1.75 mm
Maximum supply voltage	1.89 V	1.89 V	1.89 V	1.89 V	1.89 V	1.89 V
Minimum supply voltage	1.425 V	1.425 V	1.425 V	1.425 V	1.425 V	1.425 V
Nominal supply voltage	1.5 V	1.5 V	1.5 V	1.5 V	1.5 V	1.5 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	NO LEAD	GULL WING	NO LEAD	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.5 mm	1.27 mm	0.5 mm	0.65 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	3 mm	2 mm	3.9 mm	2 mm	3 mm	3.9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Base Number Matches	1	1	1	1	1	1
Maker	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

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