5962-8984001LX datasheet, PDF - EEWORLD Datasheet

5962-8984001LX: DescriptionEE PLD, 25ns, PAL-Type, CMOS, CDIP24, 0.250 X 1.250 INCH, SKINNY, CERAMIC, DIP-24; CategoryProgrammable logic Programmable logic devices; File Size214KB，6 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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5962-8984001LX Overview

EE PLD, 25ns, PAL-Type, CMOS, CDIP24, 0.250 X 1.250 INCH, SKINNY, CERAMIC, DIP-24

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Lattice
Parts packaging code	DIP
package instruction	0.250 X 1.250 INCH, SKINNY, CERAMIC, DIP-24
Contacts	24
Reach Compliance Code	unknown
ECCN code	EAR99
Other features	PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET
Architecture	PAL-TYPE
maximum clock frequency	25 MHz
JESD-30 code	R-GDIP-T24
length	31.9405 mm
Humidity sensitivity level	1
Dedicated input times	12
Number of I/O lines	8
Number of entries	20
Output times	8
Number of product terms	64
Number of terminals	24
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	12 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Programmable logic type	EE PLD
propagation delay	25 ns
Certification status	Not Qualified
Filter level	38535Q/M;38534H;883B
Maximum seat height	5.08 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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