PCF2128
Integrated RTC / TCXO / Crystal
Rev. 00.03 — 4 June 2007
Preliminary [short] data sheet
1. General description
The PCF2128 is a ready to run CMOS real time clock/calendar with an integrated
temperature compensated crystal oscillator (TCXO). In timekeeping applications the high
accuracy of the PCF2128 allows it to be used as a replacement for costly and higher
powered long wave receivers or GPS receivers. A programmable battery switch-over
circuit enables an uninterruptible power supply and consequently continuous timekeeping.
The PCF2128 additionally features 512 bytes of general purpose RAM, a programmable
watchdog, a time stamp facility and a voltage monitoring facility. Programming is possible
using either an SPI or an I
2
C-bus interface.
2. Features
Integration of a 32.768 kHz quartz
crystal in the same package as the RTC
temperature compensated crystal
oscillator (TCXO) with integrated
capacitors.
accuracy:
typically 3 ppm from−20
°C
to
+70 °C,
typically 5 ppm from
−40 °C
to
+85 °C
provides year, month, day, weekday,
hours, minutes and seconds
programmable alarm function with
interrupt capability
programmable countdown timer with
interrupt capability
programmable watchdog timer with
interrupt and reset capability
timestamp function with interrupt
capability
battery backup input pin and switch-over
circuitry
extra power fail detection with input and
output pins
battery low detection
battery backed output voltage pin
512 bytes of general purpose static
RAM
1 second or 1 minute interrupt output
oscillator stop detection
two line bi-directional 1 MHz fast mode
plus I
2
C interface
timestamp input
power-on reset
3 line SPI interface with separate data
input and output (maximum speed
6.5 Mbits/s)
programmable square wave output pin
I
2
C-bus slave address: read A3H and
write A2H
clock operating voltage: <tbd> to 5.5 V
low backup current; typical 0.95
μA
at
V
DD
= 3.0 V and T
amb
= 25
°C
selectable I
2
C and SPI interface
NXP Semiconductors
PCF2128
Real time clock / calendar
3. Quick reference data
Table 1.
Quick reference data
V
DD
= 1.8 to 5.5 V; V
SS
= 0 V; T
amb
=
−
40 to
+
85
°
C unless otherwise specified.
Symbol
V
DD
I
DD
Parameter
supply voltage
supply current
interface active
f
SCL
= 6.5 MHz
f
SCL
= 1.0 MHz
interface inactive (f
SCL
= 0 kHz)
timekeeping and power management
configuration, CLKOUT disabled;
V
DD
= 5.0 V
V
DD
= 3.0 V
interface inactive (f
SCL
= 0 kHz)
timekeeping configuration; T
amb
=
+25 °C
V
DD
= 5.0 V
V
DD
= 3.0 V
f
SCL
Δf
/ f
T
amb
T
stg
SCL clock frequency
frequency stability
(f
o
=
32.768 kHz)
ambient temperature
storage temperature
T
amb
=
−40
to
+85 °C
T
amb
=
−20
to
+70 °C
operating
-
-
0
-
-
−40
−65
850
450
-
±5
±3
-
-
-
-
6.5
-
±5
+85
+150
nA
nA
MHz
ppm
ppm
°C
°C
-
-
2700
2100
-
-
nA
nA
-
-
-
-
800
200
μA
μA
Conditions
Min
1.8
Typ
-
Max
5.5
Unit
V
4. Ordering information
Table 2:
Ordering information
Package
Name
SO20
Description
plastic thin shrink small outline package; 20 leads; body width 4.4mm
Version
SOT163-1
Type number Topside
mark
PCF2128T / 1 PCF2128T
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
2 of 10
NXP Semiconductors
PCF2128
Real time clock / calendar
5. Block diagram
INT
17
OSCI
32.768 kHz
TCXO
DIVIDER
AND
TIMER
CONTROL 1
CONTROL 2
CONTROL 3
SECONDS
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
OSCO
CLKOUT
V
OUT
V
DD
V
BAT
V
SS
7
18
20
19
8
BATTERY BACK UP
SWITCH-OVER
CIRCUITRY
internal
power
supply
MINUTES
TEMP
1 Hz
HOURS
DAYS
LOGIC
CONTROL
WEEKDAYS
MONTHS
YEARS
OSCILLATOR
MONITOR
RESET
SECOND ALARM
MINUTE ALARM
HOUR ALARM
ADDRESS
REGISTER
DAY ALARM
WEEKDAY ALARM
CLOCKOUT CONTROL
TIMER CONTROL
COUNTDOWN TIMER
RST
SDA/CE
SDO
SDI
SCL
16
4
3
2
1
SERIAL BUS
INTERFACE
IFS
5
INTERFACE
SELECTORS
1/16 SECOND TIMESTAMP
SECOND TIMESTAMP
MINUTE TIMESTAMP
SCL
SDA/CE
TS
6
I
2
C BUS
INTERFACE
HOUR TIMESTAMP
DAY TIMESTAMP
MONTH TIMESTAMP
SCL
SDO
SDI
SDA/CE
15
1.25 V
(internal)
14
PFO
TEMPERATURE
SENSOR
13
TEST
512 BYTES
STATIC RAM
YEAR TIMESTAMP
CRYSTAL AGING OFFSET
RAM ADDRESS MSB
RAM ADDRESS LSB
RAM WRITE
PFI
TEMP
RAM READ
001aag059_02
Fig 1. Block diagram of PCF2128
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
3 of 10
NXP Semiconductors
PCF2128
Real time clock / calendar
6. Pinning information
6.1 Pinning
SCL
SDI
SDO
SDA/CE
IFS
TS
CLKOUT
V
SS
n.c.
1
2
3
4
5
6
7
8
9
20 V
DD
19 V
BAT
18 V
OUT
17 INT
16 RST
15 PFI
14 PFO
13 TEST
12 n.c.
11 n.c.
001aag060
die
oscillator
PCF2128
n.c. 10
001aag576
Fig 2. Pin configuration SO20
Table 3:
Symbol
SCL
Pin description PCF2128
Pin
1
Description
combined serial clock input for both I
2
C
and SPI interface. May float when CE
inactive.
serial data input for SPI interface. May
float when CE inactive.
serial data output for SPI interface,
push-pull
combined serial data input / output for the
I
2
C interface and chip enable input (active
LOW) for the SPI interface.
interface selector input
Fig 3. SO20 (3d)
Symbol
V
DD
Pin
20
Description
positive supply voltage
SDI
SDO
SDA / CE
2
3
4
V
BAT
V
OUT
INT
19
18
17
battery backup supply voltage
battery backed output voltage
interrupt output (open-drain; active
LOW)
reset output (open drain; active LOW)
IFS
5
RST
16
•
•
TS
CLKOUT
V
SS
nc
nc
6
7
8
9
10
connect to ground to select the SPI
interface
connect to V
OUT
(pin 18) to select the
I
2
C interface
PFI
PFO
TEST
nc
nc
15
14
13
12
11
power fail input
power fail output (open drain; active
LOW)
Do not connect and do not use as feed
through.
Do not connect and do not use as feed
through.
Do not connect and do not use as feed
through.
timestamp input (active LOW) with 200 kΩ
internal pull-up resistor
clock output (open drain)
ground
Do not connect and do not use as feed
through.
Do not connect and do not use as feed
through.
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
4 of 10
NXP Semiconductors
PCF2128
Real time clock / calendar
7. Limiting values
Table 4:
Symbol
V
DD
V
BAT
I
DD
V
I
V
O
I
I
I
O
P
tot
T
amb
T
stg
Limiting valuesIn
accordance with the Absolute Maximum Rating System (IEC 60134).
Parameter
supply voltage
backup battery supply
voltage
supply current
input voltage
output voltage
input current
output current
total power dissipation
ambient temperature
storage temperature
Conditions
Min
−0.5
−0.5
−50
−0.5
−0.5
−10
−10
-
−40
−65
Max
+6.5
+6.5
+50
+6.5
+6.5
+10
+10
300
+85
+150
Unit
V
V
mA
V
V
mA
mA
mW
°C
°C
7.1 ESD values
•
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115 and 2000 V CDM per JESD22-C101.
•
Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA.
8. Application information
•
The PCF2128 is a ready to run real time clock; no external quartz is required.
•
You can set different configurations in your application depending on the PCF2128
functions you want to use.
•
The integration of the quartz crystal in the same package as the RTC has the
following advantages:
–
elimination of crystal procurement issues
–
elimination of RTC frequency tuning
–
no more crystal PCB layout issues.
•
You can select the SPI or I
2
C-bus interface using the IFS pin.
•
By connecting a battery to V
BAT
an uninterruptible power supply is guaranteed.
•
You can use the battery backed voltage V
OUT
to supply an external RAM to retain
RAM data in battery backup mode.
•
You can connect PFI through an external voltage divider to V
DD
to allow extra power
fail detection. If not used, connect PFI to V
SS
.
•
You can connect the timestamp input pin TS to a push button for tamper detection.
PCF2128_SDS_0
© NXP B.V. 2007. All rights reserved.
Preliminary [short] data sheet
Rev. 00.03 — 4 June 2007
5 of 10
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