530MA634M000DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > oscillator> 530MA634M000DG

530MA634M000DG: DescriptionLVPECL Output Clock Oscillator, 634MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530MA634M000DG Overview

LVPECL Output Clock Oscillator, 634MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530MA634M000DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	634 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

AD694 functional schematic diagram

L297, L298 stepper motor control circuit

Gantry milling machine spindle control circuit

ultrasonic receiver

Voltage controlled oscillator circuit diagram with exponential characteristics

Electronic clock improved circuit diagram

Rookie Help Timer: StartFragmentThe above is the official code to operate the timer interrupt. How is the timing calculated? And what is the TIMPeriod_level for and why should it be set? ?...; guanhui stm32/stm8

[TI, EEWORLD Double Festival Gift] LM3S9B96 Development Kit is waiting for you! (Awards have been awarded): [Award Ceremony] LM3S9B96 Development Kit Double Festival Gift~~ https://bbs.eeworld.com.cn/thread-307854-1-1.html————————————————————————————————————————Mid-Autumn Festival has just arrived, and Nati...; EEWORLD社区 Microcontroller MCU

[GD32E503 Review] Part 4: Screen and RTC code integration: 1. Introduction After thinking about it, if there is a screen, then we must do something serious. Then I thought of making a simple combination of RTC and screen first, because the official provides R...; PowerWorld Domestic Chip Exchange

Altium Designer interface display problem: Hey guys, I recently bought a new laptop with a 3K display, which has a high resolution. So the display interface of many softwares after running on my computer is quite strange. It is similar to Adob...; mingyao PCB Design

Open folder dialog box in evc: Does evc have an API to open a folder dialog? The SHBrowseForFolder() function cannot be compiled in evc. Is there any other way? Wince can only open files, right? Please help me, experts!...; ZXZ2002 Embedded System

Bipolar current source maintains high output impedance at high frequencies: 基于仪器和运算放大器的传统电流源和电压/电流转换器在低频下提供很高的输出阻抗，这是因为放大器具有良好的低频 CMRR（共模抑制比）。在较高频率下，降低的 CMRR、固有的输出电容、转换率的局限性阻止了高质量电流源的实现。Analog Devices 公司的两款 200 MHz线路接收/放大 IC——AD8129 和 AD8130——提供了差分输入和显著的 CMRR，使它们成为构建高频恒流源的有力候...; zbz0529 Power technology

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components