FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13742-1E
16-bit Proprietary Microcontroller
CMOS
F MC-16LX MB90980 Series
MB90982/MB90F983/MB90V485B
■
DESCRIPTION
The MB90980 series is a 16-bit general-purpose FUJITSU microcontroller designed for process control in con-
sumer devices and other applications requiring high-speed real-time processing.
The F
2
MC-16LX CPU core instruction set retains the AT architecture of the F
2
MC*
1
family, with additional instruc-
tions for high-level languages, expanded addressing mode, enhanced multiply-drive instructions, and complete
bit processing. In addition, a 32-bit accumulator is provided to enable long-word processing.
The MB90980 series features embedded peripheral resources including 8/16-bit PPG, expanded I/O serial inter-
face, UART, 10-bit A/D converter, 16-bit I/O timer, 8/16-bit up/down-counter, PWC timer, I
2
C*
2
interface, DTP/
external interrupt, chip select, and 16-bit reload timer.
*1 : F
2
MC is the abbreviation of FUJITSU Flexible Microcontroller.
*2 : Purchase of Fujitsu I
2
C components conveys a license under the Philips I
2
C Patent Rights to use, these
components in an I
2
C system provided that the system conforms to the I
2
C standard Specification as defined by
Philips.
2
■
FEATURES
• Clock
•
Minimum instruction execution time:
40.0 ns/6.25 MHz base frequency multiplied
×
4 (25 MHz internal operating frequency/3.3 V
±
0.3 V)
62.5 ns/4 MHz base frequency multiplied
×
4 (16 MHz internal operating frequency/3.0 V
±
0.3 V)
PLL clock multiplier
(Continued)
Be sure to refer to the “Check Sheet” for the latest cautions on development.
“Check Sheet” is seen at the following support page
URL : http://jp.fujitsu.com/microelectronics/products/micom/support/index.html
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system
development.
Copyright©2006 FUJITSU LIMITED All rights reserved
MB90980 Series
(Continued)
• Maximum memory space
•
16 Mbytes
• Instruction set optimized for controller applications
•
Supported data types (bit, byte, word, or long word)
•
Typical addressing modes (23 types)
•
Enhanced signed multiplication/division instruction and RETI instruction functions
•
32-bit accumulator for enhanced high-precision calculation
• Instruction set designed for high-level language (C) and multi-task operations
•
System stack pointer adopted
•
Instruction set compatibility and barrel shift instructions
• Enhanced execution speed
•
4 byte instruction queue
• Enhanced interrupt functions
•
8 levels setting with programmable priority, 8 external interrupt pins
• Data transmission function (µDMAC)
•
Up to 16 channels
• Embedded ROM
•
Flash versions : 192 Kbytes, Mask versions : 128 Kbytes
• Embedded RAM
•
Flash versions : 12 Kbytes, Mask versions : 10 Kbytes
• General purpose ports
•
Up to 48 ports
(10 ports with output open-drain settings)
• 8/10-bit A/D converter
•
8-channel RC sequential comparison type (10-bit resolution, 3.68
µs
conversion time (at 25 MHz) )
• I
2
C interface
•
1 channel, P76/P77 N-ch open drain pin (without P-ch)
• UART
•
1 channel
• Extended I/O serial interface (SIO)
•
2 channels
• 8/16-bit PPG
•
2 channels (with 8-bit
×
4 channels/16-bit
×
2 channels mode switching function)
• 8/16-bit up/down timer
•
1 channel (with 8-bit
×
2 channels/16-bit
×
1-channel mode switching function)
• 16-bit PWC
•
2 channels (Capable of compare the inputs)
• 16-bit reload timer
•
1 channel
• 16-bit I/O timer
•
2 channels input capture, 4 channels output compare, 1 channel free run timer
• On chip dual clock generator system
• Low-power consumption (standby) mode
•
With stop mode, sleep mode, CPU intermittent operation mode, watch timer mode, timebase timer mode
2
MB90980 Series
• Packages
•
LQFP 64
• Process
•
CMOS technology
• Power supply voltage
3 V, single source (some ports can be operated by 5 V power supply.)
3
MB90980 Series
■
PRODUCT LINEUP
Part number
Item
Classification
ROM size
RAM size
MB90982
MB90F983
MB90V485B
Mask ROM product
Flash memory product
Evaluation product
128 Kbytes
192 Kbytes
⎯
10 Kbytes
12 Kbytes
16 Kbytes
Number of instructions
: 351
Instruction bit length
: 8-bit, 16-bit
CPU function
Instruction length
: 1 byte to 7 bytes
Data bit length
: 1-bit, 8-bits, 16-bits
Minimum execution time
: 40 ns (25 MHz machine clock)
General-purpose I/O ports: up to 48
General-purpose I/O ports (CMOS output)
Ports
General-purpose I/O ports (with pull-up resistance Input)
General-purpose I/O ports (N-ch open drain output)
UART
1 channel, start-stop synchronized
8-bit
×
6 channels/
8/16-bit PPG
8-bit
×
4 channels/16-bit
×
2 channels
16-bit
×
3 channels
8/16-bit up/down
6 event input pins, 8-bit up/down counters : 2
counter/timer
8-bit reload/compare registers : 2
16-bit free run
Number of channels : 1
timer
Overflow interrupt
Number of channels : 6
16-bit
Output compare Number of channels : 4
Pin input factor : A match
I/O timers (OCU)
Pin input factor : A match signal of compare register
signal of compare register
Input capture
Number of channels : 2
(ICU)
Rewriting a register value upon a pin input (rising, falling, or both edges)
DTP/external interrupt circuit Number of external interrupt channels : 8 (edge or level detection)
Extended I/O serial interface 2 channels, embedded
1 channel
I
2
C interface*
2
PWC
2 channels
3 channels
18-bit counter
Timebase timer
Interrupt cycles: 1.0 ms, 4.1 ms, 16.4 ms, 131.1 ms (at 4 MHz base oscillator)
Conversion resolution : 8/10-bit, switchable
One-shot conversion mode (converts selected channel 1 time only)
Scan conversion mode (conversion of multiple consecutive channels,
A/D converter
programmable up to 8 channels)
Continuous conversion mode (repeated conversion of selected channels)
Stop conversion mode (conversion of selected channels with repeated pause)
Reset generation interval : 3.58 ms, 14.33 ms, 57.23 ms, 458.75 ms
Watchdog timer
(minimum value, at 4 MHz base oscillator)
Low-power consumption
Sleep mode, stop mode, CPU intermittent mode, watch timer mode, timebase timer
(standby) modes
mode
Process
CMOS
Mask model 3V/5V
Flash model 3V/5V
3V/5V power supply*
1
Type
1
power supply*
1
power supply*
Emulator power supply*
3
⎯
⎯
Yes
(Continued)
4
MB90980 Series
(Continued)
*1 : 3V/5V I/F pin : All pins should be for 3 V power supply without P24 to P27, P30 to P37, P40 to P42,
P70 to P74, P76, and P77.
*2 : P76/P77 pins are N-ch open drain pins (without P-ch) at built-in I
2
C.
*3 : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01) is used.
Please refer to the hardware manual of MB2147-01 or MB2147-20 (“3.3 Emulator-dedicated Power Supply
Switching”) about details.
Note : Ensure that you must write to Flash at V
CC
=
3.13 V to 3.60 V (3.3 V
+
10%,
−5%)
.
5
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